Remove all address comments

This commit is contained in:
mid-kid
2018-06-24 16:09:41 +02:00
parent 131875d3e3
commit 1d9a68dbdd
616 changed files with 12133 additions and 20380 deletions

View File

@@ -1,12 +1,11 @@
GetSRAMBank:: ; 2fcb
GetSRAMBank::
; load sram bank a
; if invalid bank, sram is disabled
cp NUM_SRAM_BANKS
jr c, OpenSRAM
jr CloseSRAM
; 2fd1
OpenSRAM:: ; 2fd1
OpenSRAM::
; switch to sram bank a
push af
; latch clock data
@@ -19,9 +18,8 @@ OpenSRAM:: ; 2fd1
pop af
ld [MBC3SRamBank], a
ret
; 2fe1
CloseSRAM:: ; 2fe1
CloseSRAM::
push af
ld a, SRAM_DISABLE
; reset clock latch for next time
@@ -30,4 +28,3 @@ CloseSRAM:: ; 2fe1
ld [MBC3SRamEnable], a
pop af
ret
; 2fec