diff --git a/src/asm/parser.y b/src/asm/parser.y index 400f8694..85a520ac 100644 --- a/src/asm/parser.y +++ b/src/asm/parser.y @@ -354,7 +354,6 @@ %type relocexpr_no_str %type reloc_3bit %type reloc_8bit -%type reloc_8bit_offset %type reloc_16bit // Constant numbers @@ -403,6 +402,7 @@ %type op_a_n %type op_a_r %type op_mem_ind +%type op_sp_offset // Data types used only in specific contexts %type align_spec @@ -1355,17 +1355,6 @@ reloc_8bit: } ; -reloc_8bit_offset: - OP_ADD relocexpr { - $$ = std::move($2); - $$.checkNBit(8); - } - | OP_SUB relocexpr { - $$.makeUnaryOp(RPN_NEG, std::move($2)); - $$.checkNBit(8); - } -; - reloc_16bit: relocexpr { $$ = std::move($1); @@ -2199,13 +2188,10 @@ sm83_ld: ; sm83_ld_hl: - SM83_LD MODE_HL COMMA MODE_SP reloc_8bit_offset { + SM83_LD MODE_HL COMMA MODE_SP op_sp_offset { sect_ConstByte(0xF8); sect_RelByte($5, 1); } - | SM83_LD MODE_HL COMMA MODE_SP { - ::error("LD HL, SP is not a valid instruction; use LD HL, SP + 0"); - } | SM83_LD MODE_HL COMMA reloc_16bit { sect_ConstByte(0x01 | (REG_HL << 4)); sect_RelWord($4, 1); @@ -2549,6 +2535,20 @@ op_a_n: } ; +op_sp_offset: + OP_ADD relocexpr { + $$ = std::move($2); + $$.checkNBit(8); + } + | OP_SUB relocexpr { + $$.makeUnaryOp(RPN_NEG, std::move($2)); + $$.checkNBit(8); + } + | %empty { + ::error("LD HL, SP is not a valid instruction; use LD HL, SP + 0"); + } +; + // Registers and condition codes. MODE_A: