diff --git a/docs/gbz80.7.html b/docs/gbz80.7.html index d1d77b28..830ee3f6 100644 --- a/docs/gbz80.7.html +++ b/docs/gbz80.7.html @@ -1,13 +1,14 @@ +
--OR A,B ++ +NAME
+gbz80— +CPU opcode reference++ +DESCRIPTION
+This is the list of opcodes supported by rgbasm(1), including + a short description, the number of bytes needed to encode them and the number + of CPU cycles at 1MHz (or 2MHz in GBC dual speed mode) needed to complete + them. +Note: All arithmetic/logic operations that use register + A as destination can omit the destination as it is assumed + it's register A. The following two lines have the same + effect:
++-+OR A,B OR BLEGEND
++ +LEGEND
List of abbreviations used in this document.-
-- -
- -
- r8
-- Any of the 8-bit registers (A, - B, C, - D, E, - H, L).
-- -
- -
- r16
-- Any of the general-purpose 16-bit registers - (BC, DE, - HL).
-- -
- -
- n8
-- 8-bit integer constant.
-- -
- -
- n16
-- 16-bit integer constant.
-- -
- -
- e8
-- 8-bit offset - (-128 to - 127).
-- -
- -
- u3
-- 3-bit unsigned integer constant - (0 to 7).
-- -
- -
- cc
-- Condition codes: +
- r8
+- Any of the 8-bit registers (A, B, + C, D, E, + H, L).
+- r16
+- Any of the general-purpose 16-bit registers (BC, + DE, HL).
+- n8
+- 8-bit integer constant.
+- n16
+- 16-bit integer constant.
+- e8
+- 8-bit offset (
+-128 to + 127).- u3
+- 3-bit unsigned integer constant (0 to + 7).
+- cc
+- Condition codes:
--
- Z:
-- Execute if Z is set.
-- NZ:
-- Execute if Z is not set.
-- C:
-- Execute if C is set.
-- NC:
-- Execute if C is not set.
+- Z:
+- Execute if Z is set.
+- NZ:
+- Execute if Z is not set.
+- C:
+- Execute if C is set.
+- NC:
+- Execute if C is not set.
- -
- -
- vec
-- One of the RST vectors - (0x00, 0x08, - 0x10, 0x18, - 0x20, 0x28, - 0x30 and - 0x38).
+- vec
+- One of the RST vectors (0x00, + 0x08, 0x10, 0x18, + 0x20, 0x28, 0x30 and + 0x38).
INSTRUCTION +
+ +INSTRUCTION OVERVIEW
-8-bit +
+ +8-bit Arithmetic and Logic Instructions
-
-- ADC - A,r8
- -- ADC - A,[HL]
- -- ADC - A,n8
- -- ADD - A,r8
- -- ADD - A,[HL]
- -- ADD - A,n8
- -- AND - A,r8
- -- AND - A,[HL]
- -- AND - A,n8
- -- CP A,r8
- -- CP - A,[HL]
- -- CP A,n8
- -- DEC r8
- -- DEC - [HL]
- -- INC r8
- -- INC - [HL]
- -- OR A,r8
- -- OR - A,[HL]
- -- OR A,n8
- -- SBC - A,r8
- -- SBC - A,[HL]
- -- SBC - A,n8
- -- SUB - A,r8
- -- SUB - A,[HL]
- -- SUB - A,n8
- -- XOR - A,r8
- -- XOR - A,[HL]
- -- XOR - A,n8
- +- ADC A,r8
+ +- ADC A,[HL]
+ +- ADC A,n8
+ +- ADD A,r8
+ +- ADD A,[HL]
+ +- ADD A,n8
+ +- AND A,r8
+ +- AND A,[HL]
+ +- AND A,n8
+ +- CP A,r8
+ +- CP A,[HL]
+ +- CP A,n8
+ +- DEC r8
+ +- DEC [HL]
+ +- INC r8
+ +- INC [HL]
+ +- OR A,r8
+ +- OR A,[HL]
+ +- OR A,n8
+ +- SBC A,r8
+ +- SBC A,[HL]
+ +- SBC A,n8
+ +- SUB A,r8
+ +- SUB A,[HL]
+ +- SUB A,n8
+ +- XOR A,r8
+ +- XOR A,[HL]
+ +- XOR A,n8
+16-bit +
+ +16-bit Arithmetic Instructions
-
-- ADD - HL,r16
- -- DEC r16
- -- INC r16
- +- ADD HL,r16
+ +- DEC r16
+ +- INC r16
+Bit +
+ +Bit Operations Instructions
-
-- BIT - u3,r8
- -- BIT - u3,[HL]
- -- RES - u3,r8
- -- RES - u3,[HL]
- -- SET - u3,r8
- -- SET - u3,[HL]
- -- SWAP r8
- -- SWAP - [HL]
- +- BIT u3,r8
+ +- BIT u3,[HL]
+ +- RES u3,r8
+ +- RES u3,[HL]
+ +- SET u3,r8
+ +- SET u3,[HL]
+ +- SWAP r8
+ +- SWAP [HL]
+Bit +
+ +Bit Shift Instructions
-
-- RL r8
- -- RL [HL]
- -- RLA
- -- RLC r8
- -- RLC - [HL]
- -- RLCA
- -- RR r8
- -- RR [HL]
- -- RRA
- -- RRC r8
- -- RRC - [HL]
- -- RRCA
- -- SLA r8
- -- SLA - [HL]
- -- SRA r8
- -- SRA - [HL]
- -- SRL r8
- -- SRL - [HL]
- +- RL r8
+ +- RL [HL]
+ +- RLA
+ +- RLC r8
+ +- RLC [HL]
+ +- RLCA
+ +- RR r8
+ +- RR [HL]
+ +- RRA
+ +- RRC r8
+ +- RRC [HL]
+ +- RRCA
+ +- SLA r8
+ +- SLA [HL]
+ +- SRA r8
+ +- SRA [HL]
+ +- SRL r8
+ +- SRL [HL]
+Load +
+ +Load Instructions
-
-- LD - r8,r8
- -- LD - r8,n8
- -- LD - r16,n16
- -- LD - [HL],r8
- -- LD - [HL],n8
- -- LD - r8,[HL]
- -- LD - [r16],A
- -- LD - [n16],A
- -- LD - [$FF00+n8],A
- -- LD - [$FF00+C],A
- -- LD - A,[r16]
- -- LD - A,[n16]
- -- LD - A,[$FF00+n8]
- -- LD - A,[$FF00+C]
- -- LD - [HL+],A
- -- LD - [HL-],A
- -- LD - A,[HL+]
- -- LD - A,[HL-]
- +- LD r8,r8
+ +- LD r8,n8
+ +- LD r16,n16
+ +- LD [HL],r8
+ +- LD [HL],n8
+ +- LD r8,[HL]
+ +- LD [r16],A
+ +- LD [n16],A
+ +- LD [$FF00+n8],A
+ +- LD [$FF00+C],A
+ +- LD A,[r16]
+ +- LD A,[n16]
+ +- LD A,[$FF00+n8]
+ +- LD A,[$FF00+C]
+ +- LD [HL+],A
+ +- LD [HL-],A
+ +- LD A,[HL+]
+ +- LD A,[HL-]
+Jumps +
+ +Jumps and Subroutines
-
-- CALL - n16
- -- CALL - cc,n16
- -- JP HL
- -- JP n16
- -- JP - cc,n16
- -- JR e8
- -- JR - cc,e8
- -- RET cc
- -- RET
- -- RETI
- -- RST vec
- +- CALL n16
+ +- CALL cc,n16
+ +- JP HL
+ +- JP n16
+ +- JP cc,n16
+ +- JR e8
+ +- JR cc,e8
+ +- RET cc
+ +- RET
+ +- RETI
+ +- RST vec
+Stack +
+ +Stack Operations Instructions
-
-- ADD - HL,SP
- -- ADD - SP,e8
- -- DEC SP
- -- INC SP
- -- LD - SP,n16
- -- LD - [n16],SP
- -- LD - HL,SP+e8
- -- LD - SP,HL
- -- POP AF
- -- POP r16
- -- PUSH AF
- -- PUSH - r16
- +- ADD HL,SP
+ +- ADD SP,e8
+ +- DEC SP
+ +- INC SP
+ +- LD SP,n16
+ +- LD [n16],SP
+ +- LD HL,SP+e8
+ +- LD SP,HL
+ +- POP AF
+ +- POP r16
+ +- PUSH AF
+ +- PUSH r16
+Miscellaneous +
+ +Miscellaneous Instructions
-
-- CCF
- -- CPL
- -- DAA
- -- DI
- -- EI
- -- HALT
- -- NOP
- -- SCF
- -- STOP
- +- CCF
+ +- CPL
+ +- DAA
+ +- DI
+ +- EI
+ +- HALT
+ +- NOP
+ +- SCF
+ +- STOP
+INSTRUCTION +
+ +INSTRUCTION REFERENCE
-ADC +
+ +ADC A,r8
-Add the value in r8 plus the carry flag to - A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Add the value in r8 plus the carry flag to + A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: Set if overflow from bit - 3.
-- C: Set if overflow from bit - 7.
+- Z: Set if result is 0.
+- N: 0
+- H: Set if overflow from bit 3.
+- C: Set if overflow from bit 7.
ADC +
+ +ADC A,[HL]
-Add the value pointed by HL plus the carry flag to - A. - -Cycles: 2 - -Bytes: 1 - -Flags: See ADC A,r8 -ADC +Add the value pointed by HL plus the carry flag to + A. +
Cycles: 2
+Bytes: 1
+Flags: See ADC A,r8
++ +ADC A,n8
-Add the value n8 plus the carry flag to - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See ADC A,r8 -ADD +Add the value n8 plus the carry flag to + A. +
Cycles: 2
+Bytes: 2
+Flags: See ADC A,r8
++ +ADD A,r8
-Add the value in r8 to - A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Add the value in r8 to A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: Set if overflow from bit - 3.
-- C: Set if overflow from bit - 7.
+- Z: Set if result is 0.
+- N: 0
+- H: Set if overflow from bit 3.
+- C: Set if overflow from bit 7.
ADD +
+ +ADD A,[HL]
-Add the value pointed by HL to - A. - -Cycles: 2 - -Bytes: 1 - -Flags: See ADD A,r8 -ADD +Add the value pointed by HL to A. +
Cycles: 2
+Bytes: 1
+Flags: See ADD A,r8
++ +ADD A,n8
-Add the value n8 to - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See ADD A,r8 -ADD +Add the value n8 to A. +
Cycles: 2
+Bytes: 2
+Flags: See ADD A,r8
++ +ADD HL,r16
-Add the value in r16 to - HL. - -Cycles: 2 - -Bytes: 1 - -Flags: +Add the value in r16 to HL. +Cycles: 2
+Bytes: 1
+Flags:
-
-- N: 0
-- H: Set if overflow from bit - 11.
-- C: Set if overflow from bit - 15.
+- N: 0
+- H: Set if overflow from bit 11.
+- C: Set if overflow from bit 15.
ADD +
+ +ADD HL,SP
-Add the value in SP to - HL. - -Cycles: 2 - -Bytes: 1 - -Flags: See ADD HL,r16 -ADD +Add the value in SP to HL. +
Cycles: 2
+Bytes: 1
+Flags: See ADD HL,r16
++ +ADD SP,e8
-Add the signed value e8 to - SP. - -Cycles: 4 - -Bytes: 2 - -Flags: +Add the signed value e8 to SP. +Cycles: 4
+Bytes: 2
+Flags:
-
-- Z: 0
-- N: 0
-- H: Set if overflow from bit - 3.
-- C: Set if overflow from bit - 7.
+- Z: 0
+- N: 0
+- H: Set if overflow from bit 3.
+- C: Set if overflow from bit 7.
AND +
+ +AND A,r8
-Bitwise AND between the value in r8 and - A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Bitwise AND between the value in r8 and + A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 1
-- C: 0
+- Z: Set if result is 0.
+- N: 0
+- H: 1
+- C: 0
AND +
+ +AND A,[HL]
-Bitwise AND between the value pointed by HL and - A. - -Cycles: 2 - -Bytes: 1 - -Flags: See AND A,r8 -AND +Bitwise AND between the value pointed by HL and + A. +
Cycles: 2
+Bytes: 1
+Flags: See AND A,r8
++ +AND A,n8
-Bitwise AND between the value in n8 and - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See AND A,r8 -BIT +Bitwise AND between the value in n8 and + A. +
Cycles: 2
+Bytes: 2
+Flags: See AND A,r8
++ +BIT u3,r8
-Test bit u3 in register - r8, set the zero flag if bit not set. - -Cycles: 2 - -Bytes: 2 - -Flags: +Test bit u3 in register r8, set the + zero flag if bit not set. +Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if the selected bit - is 0.
-- N: 0
-- H: 1
+- Z: Set if the selected bit is 0.
+- N: 0
+- H: 1
BIT +
+ +BIT u3,[HL]
-Test bit u3 in the byte pointed by - HL, set the zero flag if bit not set. - -Cycles: 3 - -Bytes: 2 - -Flags: See BIT u3,r8 -CALL +Test bit u3 in the byte pointed by HL, + set the zero flag if bit not set. +
Cycles: 3
+Bytes: 2
+Flags: See BIT u3,r8
++ +CALL n16
-Call address n16. - -Cycles: 6 - -Bytes: 3 - -Flags: None affected. -CALL +Call address n16. +
Cycles: 6
+Bytes: 3
+Flags: None affected.
++ +CALL cc,n16
-Call address n16 if condition - cc is met. - -Cycles: 6/3 - -Bytes: 3 - -Flags: None affected. -CCF
+Call address n16 if condition cc is + met. +Cycles: 6/3
+Bytes: 3
+Flags: None affected.
++ +CCF
Complement Carry Flag. - -Cycles: 1 - -Bytes: 1 - -Flags: +Cycles: 1
+Bytes: 1
+Flags:
-
-- N: 0
-- H: 0
-- C: Complemented.
+- N: 0
+- H: 0
+- C: Complemented.
CP +
+ +CP A,r8
-Subtract the value in r8 from - A and set flags accordingly, but don't store the - result. - -Cycles: 1 - -Bytes: 1 - -Flags: +Subtract the value in r8 from A and set + flags accordingly, but don't store the result. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 1
-- H: Set if no borrow from - bit 4.
-- C: Set if no borrow (set if - r8 > - A).
+- Z: Set if result is 0.
+- N: 1
+- H: Set if no borrow from bit 4.
+- C: Set if no borrow (set if r8 + > A).
CP +
+ +CP A,[HL]
-Subtract the value pointed by HL from - A and set flags accordingly, but don't store the - result. - -Cycles: 2 - -Bytes: 1 - -Flags: See CP A,r8 -CP +Subtract the value pointed by HL from A and + set flags accordingly, but don't store the result. +
Cycles: 2
+Bytes: 1
+Flags: See CP A,r8
++ +CP A,n8
-Subtract the value n8 from - A and set flags accordingly, but don't store the - result. - -Cycles: 2 - -Bytes: 2 - -Flags: See CP A,r8 -CPL
-Complement accumulator (A = - ~A). - -Cycles: 1 - -Bytes: 1 - -Flags: +Subtract the value n8 from A and set + flags accordingly, but don't store the result. +Cycles: 2
+Bytes: 2
+Flags: See CP A,r8
++ +CPL
+Complement accumulator (A = ~A). +Cycles: 1
+Bytes: 1
+Flags:
-
-- N: 1
-- H: 1
+- N: 1
+- H: 1
DAA
++ +DAA
Decimal adjust register A to get a correct BCD representation after an arithmetic instruction. - -Cycles: 1 - -Bytes: 1 - -Flags: +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- H: 0
-- C: Set or reset depending - on the operation.
+- Z: Set if result is 0.
+- H: 0
+- C: Set or reset depending on the operation.
DEC - r8
-Decrement value in register r8 by 1. - -Cycles: 1 - -Bytes: 1 - -Flags: ++ +DEC r8
+Decrement value in register r8 by 1. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 1
-- H: Set if no borrow from - bit 4.
+- Z: Set if result is 0.
+- N: 1
+- H: Set if no borrow from bit 4.
DEC +
+ +DEC [HL]
-Decrement the value pointed by HL by 1. - -Cycles: 3 - -Bytes: 1 - -Flags: See DEC r8 -DEC +Decrement the value pointed by HL by 1. +
Cycles: 3
+Bytes: 1
+Flags: See DEC r8
++ +DEC r16
-Decrement value in register r16 by 1. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -DEC - SP
-Decrement value in register SP by 1. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -DI
+Decrement value in register r16 by 1. +Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +DEC SP
+Decrement value in register SP by 1. +Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +DI
Disable Interrupts. - -Cycles: 1 - -Bytes: 1 - -Flags: None affected. -EI
+Cycles: 1
+Bytes: 1
+Flags: None affected.
++ +EI
Enable Interrupts. - -Cycles: 1 - -Bytes: 1 - -Flags: None affected. -HALT
+Cycles: 1
+Bytes: 1
+Flags: None affected.
++ +HALT
Enter CPU low power mode. - -Cycles: - - -Bytes: 1 - -Flags: None affected. -INC - r8
-Increment value in register r8 by 1. - -Cycles: 1 - -Bytes: 1 - -Flags: +Cycles: -
+Bytes: 1
+Flags: None affected.
++ +INC r8
+Increment value in register r8 by 1. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: Set if overflow from bit - 3.
+- Z: Set if result is 0.
+- N: 0
+- H: Set if overflow from bit 3.
INC +
+ +INC [HL]
-Increment the value pointed by HL by 1. - -Cycles: 3 - -Bytes: 1 - -Flags: See INC r8 -INC +Increment the value pointed by HL by 1. +
Cycles: 3
+Bytes: 1
+Flags: See INC r8
++ +INC r16
-Increment value in register r16 by 1. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -INC - SP
-Increment value in register SP by 1. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -JP - n16
-Absolute jump to address n16. - -Cycles: 4 - -Bytes: 3 - -Flags: None affected. -JP +Increment value in register r16 by 1. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +INC SP
+Increment value in register SP by 1. +Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +JP n16
+Absolute jump to address n16. +Cycles: 4
+Bytes: 3
+Flags: None affected.
++ +JP cc,n16
-Absolute jump to address n16 if condition - cc is met. - -Cycles: 4/3 - -Bytes: 3 - -Flags: None affected. -JP - HL
-Jump to address in HL, that is, load - PC with value in register - HL. - -Cycles: 1 - -Bytes: 1 - -Flags: None affected. -JR - e8
-Relative jump by adding e8 to the current - address. - -Cycles: 3 - -Bytes: 2 - -Flags: None affected. -JR +Absolute jump to address n16 if condition + cc is met. +
Cycles: 4/3
+Bytes: 3
+Flags: None affected.
++ +JP HL
+Jump to address in HL, that is, load PC with + value in register HL. +Cycles: 1
+Bytes: 1
+Flags: None affected.
++ +JR e8
+Relative jump by adding e8 to the current address. +Cycles: 3
+Bytes: 2
+Flags: None affected.
++ +JR cc,e8
-Relative jump by adding e8 to the current - address if condition cc is met. - -Cycles: 3/2 - -Bytes: 2 - -Flags: None affected. -LD +Relative jump by adding e8 to the current address if + condition cc is met. +
Cycles: 3/2
+Bytes: 2
+Flags: None affected.
++ +LD r8,r8
Store value in register on the right into register on the left. - -Cycles: 1 - -Bytes: 1 - -Flags: None affected. -LD +
Cycles: 1
+Bytes: 1
+Flags: None affected.
++ +LD r8,n8
-Load value n8 into register - r8. - -Cycles: 2 - -Bytes: 2 - -Flags: None affected. -LD +Load value n8 into register r8. +
Cycles: 2
+Bytes: 2
+Flags: None affected.
++ +LD r16,n16
-Load value n16 into register - r16. - -Cycles: 3 - -Bytes: 3 - -Flags: None affected. -LD +Load value n16 into register r16. +
Cycles: 3
+Bytes: 3
+Flags: None affected.
++ +LD [HL],r8
-Store value in register r8 into byte pointed by - register HL. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Store value in register r8 into byte pointed by register + HL. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD [HL],n8
-Store value n8 into byte pointed by register - HL. - -Cycles: 3 - -Bytes: 2 - -Flags: None affected. -LD +Store value n8 into byte pointed by register + HL. +
Cycles: 3
+Bytes: 2
+Flags: None affected.
++ +LD r8,[HL]
-Load value into register r8 from byte pointed - by register HL. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Load value into register r8 from byte pointed by register + HL. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD [r16],A
-Store value in register A into address pointed by - register r16. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Store value in register A into address pointed by register + r16. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD [n16],A
-Store value in register A into address - n16. - -Cycles: 4 - -Bytes: 3 - -Flags: None affected. -LD +Store value in register A into address + n16. +
Cycles: 4
+Bytes: 3
+Flags: None affected.
++ +LD [$FF00+n8],A
-Store value in register A into high RAM or I/O - registers. - -The following synonym forces this encoding: LDH - [$FF00+n8],A - -Cycles: 3 - -Bytes: 2 - -Flags: None affected. -LD +Store value in register A into high RAM or I/O registers. +
The following synonym forces this encoding: LDH + [$FF00+n8],A
+Cycles: 3
+Bytes: 2
+Flags: None affected.
++ +LD [$FF00+C],A
-Store value in register A into high RAM or I/O - registers. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Store value in register A into high RAM or I/O registers. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD A,[r16]
-Load value in register A from address pointed by - register r16. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Load value in register A from address pointed by register + r16. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD A,[n16]
-Load value in register A from address - n16. - -Cycles: 4 - -Bytes: 3 - -Flags: None affected. -LD +Load value in register A from address + n16. +
Cycles: 4
+Bytes: 3
+Flags: None affected.
++ +LD A,[$FF00+n8]
-Load value in register A from high RAM or I/O - registers. - -The following synonym forces this encoding: LDH - A,[$FF00+n8] - -Cycles: 3 - -Bytes: 2 - -Flags: None affected. -LD +Load value in register A from high RAM or I/O registers. +
The following synonym forces this encoding: LDH + A,[$FF00+n8]
+Cycles: 3
+Bytes: 2
+Flags: None affected.
++ +LD A,[$FF00+C]
-Load value in register A from high RAM or I/O - registers. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Load value in register A from high RAM or I/O registers. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD [HL+],A
-Store value in register A into byte pointed by - HL and post-increment - HL. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Store value in register A into byte pointed by + HL and post-increment HL. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD [HL-],A
-Store value in register A into byte pointed by - HL and post-decrement - HL. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Store value in register A into byte pointed by + HL and post-decrement HL. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD A,[HL+]
-Load value into register A from byte pointed by - HL and post-increment - HL. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Load value into register A from byte pointed by + HL and post-increment HL. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD A,[HL-]
-Load value into register A from byte pointed by - HL and post-decrement - HL. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -LD +Load value into register A from byte pointed by + HL and post-decrement HL. +
Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +LD SP,n16
-Load value n16 into register - SP. - -Cycles: 3 - -Bytes: 3 - -Flags: None affected. -LD +Load value n16 into register SP. +
Cycles: 3
+Bytes: 3
+Flags: None affected.
++ +LD [n16],SP
-Store SP into addresses - n16 (LSB) and - n16 + 1 (MSB). - -Cycles: 5 - -Bytes: 3 - -Flags: None affected. -LD +Store SP into addresses n16 (LSB) and + n16 + 1 (MSB). +
Cycles: 5
+Bytes: 3
+Flags: None affected.
++ +LD HL,SP+e8
-Add the signed value e8 to - SP and store the result in - HL. - -Cycles: 3 - -Bytes: 2 - -Flags: +Add the signed value e8 to SP and store + the result in HL. +Cycles: 3
+Bytes: 2
+Flags:
-
-- Z: 0
-- N: 0
-- H: Set if overflow from bit - 3.
-- C: Set if overflow from bit - 7.
+- Z: 0
+- N: 0
+- H: Set if overflow from bit 3.
+- C: Set if overflow from bit 7.
LD +
+ +LD SP,HL
-Load register HL into register - SP. - -Cycles: 2 - -Bytes: 1 - -Flags: None affected. -NOP
+Load register HL into register SP. +Cycles: 2
+Bytes: 1
+Flags: None affected.
++ +NOP
No operation. - -Cycles: 1 - -Bytes: 1 - -Flags: None affected. -OR +
Cycles: 1
+Bytes: 1
+Flags: None affected.
++ +OR A,r8
-Bitwise OR between the value in r8 and - A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Bitwise OR between the value in r8 and + A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: 0
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: 0
OR +
+ +OR A,[HL]
-Bitwise OR between the value pointed by HL and - A. - -Cycles: 2 - -Bytes: 1 - -Flags: See OR A,r8 -OR +Bitwise OR between the value pointed by HL and + A. +
Cycles: 2
+Bytes: 1
+Flags: See OR A,r8
++ +OR A,n8
-Bitwise OR between the value in n8 and - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See OR A,r8 -POP - AF
-Pop register AF from the stack. - -Cycles: 3 - -Bytes: 1 - -Flags: +Bitwise OR between the value in n8 and + A. +Cycles: 2
+Bytes: 2
+Flags: See OR A,r8
++ +POP AF
+Pop register AF from the stack. +Cycles: 3
+Bytes: 1
+Flags:
-
-- Z: Set from bit 7 of the - popped low byte.
-- N: Set from bit 6 of the - popped low byte.
-- H: Set from bit 5 of the - popped low byte.
-- C: Set from bit 4 of the - popped low byte.
+- Z: Set from bit 7 of the popped low byte.
+- N: Set from bit 6 of the popped low byte.
+- H: Set from bit 5 of the popped low byte.
+- C: Set from bit 4 of the popped low byte.
POP +
+ +POP r16
-Pop register r16 from the stack. - -Cycles: 3 - -Bytes: 1 - -Flags: None affected. -PUSH +Pop register r16 from the stack. +
Cycles: 3
+Bytes: 1
+Flags: None affected.
++ +PUSH AF
-Push register AF into the stack. The low byte's bit - 7 corresponds to the Z flag, its bit 6 to the - N flag, bit 5 to the - H flag, and bit 4 to the - C flag. Bits 3 to 0 are reset. - -Cycles: 4 - -Bytes: 1 - -Flags: None affected. -PUSH +Push register AF into the stack. The low byte's bit 7 + corresponds to the Z flag, its bit 6 to the + N flag, bit 5 to the H flag, and bit 4 to + the C flag. Bits 3 to 0 are reset. +
Cycles: 4
+Bytes: 1
+Flags: None affected.
++ +PUSH r16
-Push register r16 into the stack. - -Cycles: 4 - -Bytes: 1 - -Flags: None affected. -RES +Push register r16 into the stack. +
Cycles: 4
+Bytes: 1
+Flags: None affected.
++ +RES u3,r8
-Set bit u3 in register - r8 to 0. - -Cycles: 2 - -Bytes: 2 - -Flags: None affected. -RES +Set bit u3 in register r8 to 0. +
Cycles: 2
+Bytes: 2
+Flags: None affected.
++ +RES u3,[HL]
-Set bit u3 in the byte pointed by - HL to 0. - -Cycles: 4 - -Bytes: 2 - -Flags: None affected. -RET
+Set bit u3 in the byte pointed by HL to + 0. +Cycles: 4
+Bytes: 2
+Flags: None affected.
++ +RET
Return from subroutine. - -Cycles: 4 - -Bytes: 1 - -Flags: None affected. -RET - cc
-Return from subroutine if condition cc is met. - -Cycles: 5/2 - -Bytes: 1 - -Flags: None affected. -RETI
+Cycles: 4
+Bytes: 1
+Flags: None affected.
++ +RET cc
+Return from subroutine if condition cc is met. +Cycles: 5/2
+Bytes: 1
+Flags: None affected.
++ +RETI
Return from subroutine and enable interrupts. - -Cycles: 4 - -Bytes: 1 - -Flags: None affected. -RL - r8
-Rotate register r8 left through carry. - -C <- [7 <- 0] <- C- -Cycles: 2 - -Bytes: 2 - -Flags: +Cycles: 4
+Bytes: 1
+Flags: None affected.
++ +RL r8
+Rotate register r8 left through carry. + +C <- [7 <- 0] <- C+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
RL +
+ +RL [HL]
-Rotate value pointed by HL left through carry. - -C <- [7 <- 0] <- C- -Cycles: 4 - -Bytes: 2 - -Flags: See RL r8 -RLA
-Rotate register A left through carry. - -C <- [7 <- 0] <- C- -Cycles: 1 - -Bytes: 1 - -Flags: +Rotate value pointed by HL left through carry. + +C <- [7 <- 0] <- C+Cycles: 4
+Bytes: 2
+Flags: See RL r8
++ +RLA
+Rotate register A left through carry. + +C <- [7 <- 0] <- C+Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: 0
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: 0
+- N: 0
+- H: 0
+- C: Set according to result.
RLC - r8
-Rotate register r8 left. - -C <- [7 <- 0] <- [7]- -Cycles: 2 - -Bytes: 2 - -Flags: ++ +RLC r8
+Rotate register r8 left. + +C <- [7 <- 0] <- [7]+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
RLC +
+ +RLC [HL]
-Rotate value pointed by HL left. - -C <- [7 <- 0] <- [7]- -Cycles: 4 - -Bytes: 2 - -Flags: See RLC r8 -RLCA
-Rotate register A left. - -C <- [7 <- 0] <- [7]- -Cycles: 1 - -Bytes: 1 - -Flags: +Rotate value pointed by HL left. + +C <- [7 <- 0] <- [7]+Cycles: 4
+Bytes: 2
+Flags: See RLC r8
++ +RLCA
+Rotate register A left. + +C <- [7 <- 0] <- [7]+Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: 0
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: 0
+- N: 0
+- H: 0
+- C: Set according to result.
RR - r8
-Rotate register r8 right through carry. - -C -> [7 -> 0] -> C- -Cycles: 2 - -Bytes: 2 - -Flags: ++ +RR r8
+Rotate register r8 right through carry. + +C -> [7 -> 0] -> C+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
RR +
+ +RR [HL]
-Rotate value pointed by HL right through carry. - -C -> [7 -> 0] -> C- -Cycles: 4 - -Bytes: 2 - -Flags: See RR r8 -RRA
-Rotate register A right through carry. - -C -> [7 -> 0] -> C- -Cycles: 1 - -Bytes: 1 - -Flags: +Rotate value pointed by HL right through carry. + +C -> [7 -> 0] -> C+Cycles: 4
+Bytes: 2
+Flags: See RR r8
++ +RRA
+Rotate register A right through carry. + +C -> [7 -> 0] -> C+Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: 0
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: 0
+- N: 0
+- H: 0
+- C: Set according to result.
RRC - r8
-Rotate register r8 right. - -[0] -> [7 -> 0] -> C- -Cycles: 2 - -Bytes: 2 - -Flags: ++ +RRC r8
+Rotate register r8 right. + +[0] -> [7 -> 0] -> C+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
RRC +
+ +RRC [HL]
-Rotate value pointed by HL right. - -[0] -> [7 -> 0] -> C- -Cycles: 4 - -Bytes: 2 - -Flags: See RRC r8 -RRCA
-Rotate register A right. - -[0] -> [7 -> 0] -> C- -Cycles: 1 - -Bytes: 1 - -Flags: +Rotate value pointed by HL right. + +[0] -> [7 -> 0] -> C+Cycles: 4
+Bytes: 2
+Flags: See RRC r8
++ +RRCA
+Rotate register A right. + +[0] -> [7 -> 0] -> C+Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: 0
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: 0
+- N: 0
+- H: 0
+- C: Set according to result.
RST +
+ +RST vec
-Call restart vector vec. - -Cycles: 4 - -Bytes: 1 - -Flags: None affected. -SBC +Call restart vector vec. +
Cycles: 4
+Bytes: 1
+Flags: None affected.
++ +SBC A,r8
-Subtract the value in r8 and the carry flag - from A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Subtract the value in r8 and the carry flag from + A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 1
-- H: Set if no borrow from - bit 4.
-- C: Set if no borrow (set if - r8 > - A).
+- Z: Set if result is 0.
+- N: 1
+- H: Set if no borrow from bit 4.
+- C: Set if no borrow (set if r8 + > A).
SBC +
+ +SBC A,[HL]
-Subtract the value pointed by HL and the carry flag - from A. - -Cycles: 2 - -Bytes: 1 - -Flags: See SBC A,r8 -SBC +Subtract the value pointed by HL and the carry flag from + A. +
Cycles: 2
+Bytes: 1
+Flags: See SBC A,r8
++ +SBC A,n8
-Subtract the value n8 and the carry flag from - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See SBC A,r8 -SCF
+Subtract the value n8 and the carry flag from + A. +Cycles: 2
+Bytes: 2
+Flags: See SBC A,r8
++ +SCF
Set Carry Flag. - -Cycles: 1 - -Bytes: 1 - -Flags: +Cycles: 1
+Bytes: 1
+Flags:
-
-- N: 0
-- H: 0
-- C: 1
+- N: 0
+- H: 0
+- C: 1
SET +
+ +SET u3,r8
-Set bit u3 in register - r8 to 1. - -Cycles: 2 - -Bytes: 2 - -Flags: None affected. -SET +Set bit u3 in register r8 to 1. +
Cycles: 2
+Bytes: 2
+Flags: None affected.
++ +SET u3,[HL]
-Set bit u3 in the byte pointed by - HL to 1. - -Cycles: 4 - -Bytes: 2 - -Flags: None affected. -SLA - r8
-Shift left arithmetic register r8. - -C <- [7 <- 0] <- 0- -Cycles: 2 - -Bytes: 2 - -Flags: +Set bit u3 in the byte pointed by HL to + 1. +Cycles: 4
+Bytes: 2
+Flags: None affected.
++ +SLA r8
+Shift left arithmetic register r8. + +C <- [7 <- 0] <- 0+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
SLA +
+ +SLA [HL]
-Shift left arithmetic value pointed by HL. - -C <- [7 <- 0] <- 0- -Cycles: 4 - -Bytes: 2 - -Flags: See SLA r8 -SRA - r8
-Shift right arithmetic register r8. - -[7] -> [7 -> 0] -> C- -Cycles: 2 - -Bytes: 2 - -Flags: +Shift left arithmetic value pointed by HL. + +C <- [7 <- 0] <- 0+Cycles: 4
+Bytes: 2
+Flags: See SLA r8
++ +SRA r8
+Shift right arithmetic register r8. + +[7] -> [7 -> 0] -> C+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
SRA +
+ +SRA [HL]
-Shift right arithmetic value pointed by HL. - -[7] -> [7 -> 0] -> C- -Cycles: 4 - -Bytes: 2 - -Flags: See SRA r8 -SRL - r8
-Shift right logic register r8. - -0 -> [7 -> 0] -> C- -Cycles: 2 - -Bytes: 2 - -Flags: +Shift right arithmetic value pointed by HL. + +[7] -> [7 -> 0] -> C+Cycles: 4
+Bytes: 2
+Flags: See SRA r8
++ +SRL r8
+Shift right logic register r8. + +0 -> [7 -> 0] -> C+Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: Set according to - result.
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: Set according to result.
SRL +
+ +SRL [HL]
-Shift right logic value pointed by HL. - -0 -> [7 -> 0] -> C- -Cycles: 4 - -Bytes: 2 - -Flags: See SRA r8 -STOP
+Shift right logic value pointed by HL. + +0 -> [7 -> 0] -> C+Cycles: 4
+Bytes: 2
+Flags: See SRA r8
++ +STOP
Enter CPU very low power mode. Also used to switch between double and normal speed CPU modes in GBC. - -Cycles: - - -Bytes: 2 - -Flags: None affected. -SUB +
Cycles: -
+Bytes: 2
+Flags: None affected.
++ +SUB A,r8
-Subtract the value in r8 from - A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Subtract the value in r8 from A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 1
-- H: Set if no borrow from - bit 4.
-- C: Set if no borrow (set if - r8 > - A).
+- Z: Set if result is 0.
+- N: 1
+- H: Set if no borrow from bit 4.
+- C: Set if no borrow (set if r8 + > A).
SUB +
+ +SUB A,[HL]
-Subtract the value pointed by HL from - A. - -Cycles: 2 - -Bytes: 1 - -Flags: See SUB A,r8 -SUB +Subtract the value pointed by HL from A. +
Cycles: 2
+Bytes: 1
+Flags: See SUB A,r8
++ +SUB A,n8
-Subtract the value n8 from - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See SUB A,r8 -SWAP +Subtract the value n8 from A. +
Cycles: 2
+Bytes: 2
+Flags: See SUB A,r8
++ +SWAP r8
-Swap upper 4 bits in register r8 and the lower - ones. - -Cycles: 2 - -Bytes: 2 - -Flags: +Swap upper 4 bits in register r8 and the lower ones. +Cycles: 2
+Bytes: 2
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: 0
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: 0
SWAP +
+ +SWAP [HL]
-Swap upper 4 bits in the byte pointed by HL and the - lower ones. - -Cycles: 4 - -Bytes: 2 - -Flags: See SWAP r8 -XOR +Swap upper 4 bits in the byte pointed by HL and the lower + ones. +
Cycles: 4
+Bytes: 2
+Flags: See SWAP r8
++ +XOR A,r8
-Bitwise XOR between the value in r8 and - A. - -Cycles: 1 - -Bytes: 1 - -Flags: +Bitwise XOR between the value in r8 and + A. +Cycles: 1
+Bytes: 1
+Flags:
-
-- Z: Set if result is 0.
-- N: 0
-- H: 0
-- C: 0
+- Z: Set if result is 0.
+- N: 0
+- H: 0
+- C: 0
XOR +
+ +XOR A,[HL]
-Bitwise XOR between the value pointed by HL and - A. - -Cycles: 2 - -Bytes: 1 - -Flags: See XOR A,r8 -XOR +Bitwise XOR between the value pointed by HL and + A. +
Cycles: 2
+Bytes: 1
+Flags: See XOR A,r8
++ +XOR A,n8
-Bitwise XOR between the value in n8 and - A. - -Cycles: 2 - -Bytes: 2 - -Flags: See XOR A,r8 -SEE +Bitwise XOR between the value in n8 and + A. +
Cycles: 2
+Bytes: 2
+Flags: See XOR A,r8
++ SEE ALSO
-rgbasm(1), rgbds(7) -HISTORY
-rgbds was originally written by Carsten - Sørensen as part of the ASMotor package, and was later packaged in - RGBDS by Justin Lloyd. It is now maintained by a number of contributors at - https://github.com/rednex/rgbds.
rgbds was originally written by Carsten Sørensen
+ as part of the ASMotor package, and was later packaged in RGBDS by Justin
+ Lloyd. It is now maintained by a number of contributors at
+ https://github.com/rednex/rgbds.
+| February 23, 2018 | diff --git a/docs/rgbasm.1.html b/docs/rgbasm.1.html index 681567a7..db71d91a 100644 --- a/docs/rgbasm.1.html +++ b/docs/rgbasm.1.html @@ -1,13 +1,14 @@ + -
rgbasm —
+| rgbasm | -[-EhLVvw] - [-b - chars] - [-D - name[=value]] - [-g - chars] - [-i - path] - [-M - dependfile] - [-o - outfile] - [-p - pad_value] - file | +rgbasm |
+ [-EhLVvw] [-b
+ chars] [-D
+ name[=value]]
+ [-g chars]
+ [-i path]
+ [-M dependfile]
+ [-o outfile]
+ [-p pad_value]
+ file |
rgbasm program creates an object file from an
assembly source file. Its arguments are as follows:
-b
+ chars-D
+ name[=value]EQUS
+ “value” in code. If a value is not
+ specified, a value of 1 is given.-E-g
+ chars-hrgbasm inserts a ‘nop’
+ instruction immediately after any ‘halt’ instruction. The
+ -h option disables this behavior.-i
+ path-L-M
+ dependfile-o
+ outfile-p
+ pad_value-V-v-w++- -The resulting object file is not yet a usable ROM image — it must first - be run through rgblink(1) and - rgbfix(1). -$ rgbasm -o bar.o foo.asmSEE +
The resulting object file is not yet a usable ROM image — + it must first be run through rgblink(1) and + rgbfix(1).
+ ++ SEE ALSO
-rgbasm(5), rgbfix(1), - rgblink(1), - rgbds(5), rgbds(7), - gbz80(7) -HISTORY
-rgbasm was originally written by Carsten - Sørensen as part of the ASMotor package, and was later packaged in - RGBDS by Justin Lloyd. It is now maintained by a number of contributors at - https://github.com/rednex/rgbds.
rgbasm was originally written by Carsten Sørensen
+ as part of the ASMotor package, and was later packaged in RGBDS by Justin
+ Lloyd. It is now maintained by a number of contributors at
+ https://github.com/rednex/rgbds.
+| February 24, 2018 | diff --git a/docs/rgbasm.5.html b/docs/rgbasm.5.html index 803ec561..f974342e 100644 --- a/docs/rgbasm.5.html +++ b/docs/rgbasm.5.html @@ -1,13 +1,14 @@ + -
rgbasm —
+[label]
- [instruction]
- [;comment]+ ++[label] + [instruction] + [;comment]Example:
++- -All pseudo‐ops, mnemonics and registers (reserved keywords) are - case‐insensitive and all labels are case‐sensitive. - -There are two syntaxes for comments. In both cases, a comment ends at the end of - the line. The most common one is: anything that follows a semicolon - ‘John: ld a,87 ;Weee;’ (that isn't inside a string) is a - comment. There is another format: anything that follows a - ‘*’ that is placed right at the start of - a line is a comment. The assembler removes all comments from the code before - doing anything else. - -Sometimes lines can be too long and it may be necessary to split them. The - syntax to do so is the following one: - --- DB 1, 2, 3, 4 \ +All pseudo‐ops, mnemonics and registers (reserved keywords) + are case‐insensitive and all labels are case‐sensitive.
+There are two syntaxes for comments. In both cases, a comment ends + at the end of the line. The most common one is: anything that follows a + semicolon ‘
+;’ (that isn't inside a + string) is a comment. There is another format: anything that follows a + ‘*’ that is placed right at the start + of a line is a comment. The assembler removes all comments from the code + before doing anything else.Sometimes lines can be too long and it may be necessary to split + them. The syntax to do so is the following one:
++- -This works anywhere in the code except inside of strings. To split strings it is - needed to use STRCAT() like this: - -+ DB 1, 2, 3, 4 \ 5, 6, 7, 8-- DB STRCAT("Hello ", \ +This works anywhere in the code except inside of strings. To split + strings it is needed to use
+STRCAT() like this:+-+ DB STRCAT("Hello ", \ "world!")Sections
-SECTION name, - type - -SECTION name, - type, - options - -SECTION name, - type[addr] - -SECTION name, - type[addr], - options - -Before you can start writing code, you must define a section. This tells the - assembler what kind of information follows and, if it is code, where to put - it. - -name is a string enclosed in double quotes and - can be a new name or the name of an existing section. All sections assembled - at the same time that have the same name and type are considered to be the - same section, and their code is put together in the object file generated by - the assembler. All other sections must have a unique name, even in different - source files, or the linker will treat it as an error. - -Possible section types are as follows: + ++ Sections
+SECTIONname, + type ++
SECTIONname, + type, options+
SECTIONname, + type[addr]+
SECTIONname, + type[addr], + optionsBefore you can start writing code, you must define a section. This + tells the assembler what kind of information follows and, if it is code, + where to put it.
+name is a string enclosed in double quotes + and can be a new name or the name of an existing section. All sections + assembled at the same time that have the same name and type are considered + to be the same section, and their code is put together in the object file + generated by the assembler. All other sections must have a unique name, even + in different source files, or the linker will treat it as an error.
+Possible section types are as follows:
-
- -options are comma separated and may include: +- -
- -
- ROM0
-- A ROM section. addr can - range from $0000–$3FFF (or $0000–$7FFF if tiny ROM mode is - enabled in rgblink(1)).
-- -
- -
- ROMX
-- A banked ROM section. addr - can range from $4000–$7FFF. bank - can range from 1 to 511. Not available if tiny ROM mode is enabled in - rgblink(1).
-- -
- -
- VRAM
-- A banked video RAM section. - addr can range from $8000–$9FFF. - bank can be 0 or 1 but bank 1 is - unavailable if DMG mode is enabled in - rgblink(1). Memory in this section can only - be allocated with DS, not filled with - data.
-- -
- -
- SRAM
-- A banked external (save) RAM section. - addr can range from $A000–$BFFF. - bank can range from 0 to 15. Memory in - this section can only be allocated with DS, - not filled with data.
-- -
- -
- WRAM0
-- A general-purpose RAM section. - addr can range from $C000–$CFFF, - or $C000–$DFFF if DMG mode is enabled in - rgblink(1). Memory in this section can only - be allocated with DS, not filled with - data.
-- -
- -
- WRAMX
-- A banked general-purpose RAM section. - addr can range from $D000–$DFFF. - bank can range from 1 to 7. Memory in - this section can only be allocated with DS, +
- +
ROM0- A ROM section. addr can range from + $0000–$3FFF (or $0000–$7FFF if tiny ROM mode is enabled in + rgblink(1)).
+- +
ROMX- A banked ROM section. addr can range from + $4000–$7FFF. bank can range from 1 to 511. + Not available if tiny ROM mode is enabled in + rgblink(1).
+- +
VRAM- A banked video RAM section. addr can range from + $8000–$9FFF. bank can be 0 or 1 but bank 1 is + unavailable if DMG mode is enabled in rgblink(1). Memory + in this section can only be allocated with DS, not + filled with data.
+- +
SRAM- A banked external (save) RAM section. addr can range + from $A000–$BFFF. bank can range from 0 to + 15. Memory in this section can only be allocated with + DS, not filled with data.
+- +
WRAM0- A general-purpose RAM section. addr can range from + $C000–$CFFF, or $C000–$DFFF if DMG mode is enabled in + rgblink(1). Memory in this section can only be allocated + with DS, not filled with data.
+- +
WRAMX- A banked general-purpose RAM section. addr can range + from $D000–$DFFF. bank can range from 1 to 7. + Memory in this section can only be allocated with DS, not filled with data. Not available if DMG mode is enabled in - rgblink(1).
-- -
- -
- OAM
-- An object attributes RAM section. - addr can range from $FE00-$FE9F. Memory - in this section can only be allocated with - DS, not filled with data.
-- -
- -
- HRAM
-- A high RAM section. addr - can range from $FF80–$FFFE. Memory in this section can only be - allocated with DS, not filled with data. - - Note: If you use this method of allocating HRAM - the assembler will not choose the short - addressing mode in the LD instructions LD - [$FF00+n8],A and LD A,[$FF00+n8] because - the actual address calculation is done by the linker. If you find this - undesirable you can use RSSET, - RB, or RW - instead or use the LDH [$FF00+n8],A and - LDH A,[$FF00+n8] syntax instead. This forces - the assembler to emit the correct instruction and the linker to check if - the value is in the correct range. This optimization can be disabled by - passing the -L flag to - rgbasm(1).
+ rgblink(1). +- +
OAM- An object attributes RAM section. addr can range + from $FE00-$FE9F. Memory in this section can only be allocated with + DS, not filled with data.
+- +
HRAM- A high RAM section. addr can range from + $FF80–$FFFE. Memory in this section can only be allocated with + DS, not filled with data. +
Note: If you use this method of allocating + HRAM the assembler will not choose the short + addressing mode in the LD instructions LD [$FF00+n8],A + and LD A,[$FF00+n8] because the actual address + calculation is done by the linker. If you find this undesirable you can + use
+RSSET,RB, or +RWinstead or use the LDH + [$FF00+n8],A and LDH A,[$FF00+n8] syntax instead. + This forces the assembler to emit the correct instruction and the linker + to check if the value is in the correct range. This optimization can be + disabled by passing the-Lflag to + rgbasm(1).options are comma separated and may + include:
-
- -If [addr] is not specified, the section is - considered “floating”; the linker will automatically calculate - an appropriate address for the section. Similarly, if - BANK[bank] is - not specified, the linker will automatically find a bank with enough space. - -Sections can also be placed by using a linkerscript file. The format is - described in rgblink(5). They allow the user to - place floating sections in the desired bank in the order specified in the - script. This is useful if the sections can't be placed at an address manually - because the size may change, but they have to be together. - -Section examples: - -- -
- -
- BANK[bank]
-- Specify which bank for the - linker to place the section.
-- -
- -
- ALIGN[align]
-- Place the section at an address whose - align least‐significant bits are - zero. It is a syntax error to use this option with - addr.
+- +
BANK[bank]- Specify which bank for the linker to place the + section.
+- +
ALIGN[align]- Place the section at an address whose align + least‐significant bits are zero. It is a syntax error to use this + option with addr.
-+If [addr] is not specified, the section is + considered “floating”; the linker will automatically calculate + an appropriate address for the section. Similarly, if +
+BANK[bank] is not specified, + the linker will automatically find a bank with enough space.Sections can also be placed by using a linkerscript file. The + format is described in rgblink(5). They allow the user to + place floating sections in the desired bank in the order specified in the + script. This is useful if the sections can't be placed at an address + manually because the size may change, but they have to be together.
+Section examples:
++- -This switches to the section called “CoolStuff” (or creates it if - it doesn't already exist) and defines it as a code section. - -The following example defines a section that can be placed anywhere in any ROMX - bank: - -SECTION "CoolStuff",ROMX-+This switches to the section called “CoolStuff” (or + creates it if it doesn't already exist) and defines it as a code + section.
+The following example defines a section that can be placed + anywhere in any ROMX bank:
++- -If it is needed, the the base address of the section can be specified: - -SECTION "CoolStuff",ROMX-+If it is needed, the the base address of the section can be + specified:
++- -An example with a fixed bank: - -SECTION "CoolStuff",ROMX[$4567]-+An example with a fixed bank:
++- -And if you only want to force the section into a certain bank, and not it's - position within the bank, that's also possible: - -SECTION "CoolStuff",ROMX[$4567],BANK[3]-+And if you only want to force the section into a certain bank, and + not it's position within the bank, that's also possible:
++- -Alignment examples: one use could be when using DMA to copy data or when it is - needed to align the start of an array to 256 bytes to optimize the code that - accesses it. - -SECTION "CoolStuff",ROMX,BANK[7]-- SECTION "OAM Data",WRAM0,ALIGN[8] ; align to 256 bytes - +Alignment examples: one use could be when using DMA to copy data + or when it is needed to align the start of an array to 256 bytes to optimize + the code that accesses it.
++- -Hint: If you think this is a lot of typing for - doing a simple “org” type thing you can quite easily write an - intelligent macro (called ORG for example) that - uses @ for the section name and determines - correct section type etc as arguments for - SECTION. -+ SECTION "OAM Data",WRAM0,ALIGN[8] ; align to 256 bytes + SECTION "VRAM Data",ROMX,BANK[2],ALIGN[4] ; align to 16 bytesSection +
Hint: If you think this is a lot of typing for + doing a simple “org” type thing you can quite easily write an + intelligent macro (called
+ +ORGfor example) that uses +@for the section name and determines correct + section type etc as arguments forSECTION.+ + +Section Stack
-POPS and PUSHS provide - the interface to the section stack. - -PUSHS will push the current section context on the - section stack. POPS can then later be used to - restore it. Useful for defining sections in included files when you don't want - to destroy the section context for the program that included your file. The - number of entries in the stack is limited only by the amount of memory in your - machine. -SYMBOLS
-Symbols
+POPSandPUSHSprovide the + interface to the section stack. ++
PUSHSwill push the current section + context on the section stack.POPScan then later be + used to restore it. Useful for defining sections in included files when you + don't want to destroy the section context for the program that included your + file. The number of entries in the stack is limited only by the amount of + memory in your machine.+ SYMBOLS
++ Symbols
RGBDS supports several types of symbols:-
- -A symbol cannot have the same name as a reserved keyword. +- Label
-- Used to assign a memory location with a name
-- EQUate
-- Give a constant a name.
-- SET
-- Almost the same as EQUate, but you can change the value of - a SET during assembling.
-- Structure - (the RS group)
-- Define a structure easily.
-- String equate - (EQUS)
-- Give a frequently used string a name. Can also be used as - a mini-macro, like #define in C.
-- MACRO
-- A block of code or pseudo instructions that you invoke - like any other mnemonic. You can give them arguments too.
+- Label
+- Used to assign a memory location with a name
+- EQUate
+- Give a constant a name.
+- SET
+- Almost the same as EQUate, but you can change the value of a SET during + assembling.
+- Structure (the RS group)
+- Define a structure easily.
+- String equate (EQUS)
+- Give a frequently used string a name. Can also be used as a mini-macro, + like
+#definein C.- MACRO
+- A block of code or pseudo instructions that you invoke like any other + mnemonic. You can give them arguments too.
A symbol cannot have the same name as a reserved keyword.
-
- Label
-- - - One of the assembler's main tasks is to keep track of addresses for you so - you don't have to remember obscure numbers but can make do with a - meaningful name, a label. - - This can be done in a number of ways: - -
--GlobalLabel -AnotherGlobal: -.locallabel -.yet_a_local: -AnotherGlobal.with_another_local: -ThisWillBeExported:: ;note the two colons +- Label
+- +
-One of the assembler's main tasks is to keep track of + addresses for you so you don't have to remember obscure numbers but can + make do with a meaningful name, a label.
+This can be done in a number of ways:
++- - In the line where a label is defined there musn't be any whitespace before - it. Local labels are only accessible within the scope they are defined. A - scope starts after a global label and ends at the next global label. - Declaring a label (global or local) with :: does an EXPORT at the same - time. Local labels can be declared as scope.local or simply as as .local. - If the former notation is used, the scope must be the actual current - scope. - - Labels will normally change their value during the link process and are thus - not constant. The exception is the case in which the base address of a - section is fixed, so the address of the label is known at assembly time. - - The subtraction of two labels is only constant (known at assembly time) if - they are two local labels that belong to the same scope, or they are two - global labels that belong to sections with fixed base addresses.+GlobalLabel +AnotherGlobal: +.locallabel +.yet_a_local: +AnotherGlobal.with_another_local: +ThisWillBeExported:: ;note the two colons ThisWillBeExported.too::- EQU
-- - - EQUates are constant symbols. They can, for example, be used for things such - as bit-definitions of hardware registers. - -
--EXIT_OK EQU $00 +In the line where a label is defined there musn't be any + whitespace before it. Local labels are only accessible within the scope + they are defined. A scope starts after a global label and ends at the + next global label. Declaring a label (global or local) with :: does an + EXPORT at the same time. Local labels can be declared as scope.local or + simply as as .local. If the former notation is used, the scope must be + the actual current scope.
+Labels will normally change their value during the link + process and are thus not constant. The exception is the case in which + the base address of a section is fixed, so the address of the label is + known at assembly time.
+The subtraction of two labels is only constant (known at + assembly time) if they are two local labels that belong to the same + scope, or they are two global labels that belong to sections with fixed + base addresses.
+ +- EQU
+- +
-EQUates are constant symbols. They can, for example, be used + for things such as bit-definitions of hardware registers.
++- - Note that a colon (:) following the label-name is not allowed. EQUates - cannot be exported and imported. They don't change their value during the - link process.+EXIT_OK EQU $00 EXIT_FAILURE EQU $01- SET
-- - - SETs are similar to EQUates. They are also constant symbols in the sense - that their values are defined during the assembly process. These symbols - are normally used in macros. - -
--ARRAY_SIZE EQU 4 -COUNT SET 2 +Note that a colon (:) following the label-name is not allowed. + EQUates cannot be exported and imported. They don't change their value + during the link process.
+ +- SET
+- +
SETs are similar to EQUates. They are also constant symbols in + the sense that their values are defined during the assembly process. + These symbols are normally used in macros.
++- - Note that a colon (:) following the label-name is not allowed. SETs cannot - be exported and imported. Alternatively you can use = as a synonym for - SET. - -+ARRAY_SIZE EQU 4 +COUNT SET 2 COUNT SET ARRAY_SIZE+COUNT-+Note that a colon (:) following the label-name is not allowed. + SETs cannot be exported and imported. Alternatively you can use = as a + synonym for SET.
++-COUNT = 2- RSSET, - RSRESET, RB, - RW
-- - - The RS group of commands is a handy way of defining structures: - -
-- RSRESET -str_pStuff RW 1 -str_tData RB 256 -str_bCount RB 1 +- RSSET, RSRESET, RB, + RW
+- +
The RS group of commands is a handy way of defining + structures:
++- - The example defines four equated symbols: - -+ RSRESET +str_pStuff RW 1 +str_tData RB 256 +str_bCount RB 1 str_SIZEOF RB 0--str_pStuff = 0 -str_tData = 2 -str_bCount = 258 +The example defines four equated symbols:
++- - There are four commands in the RS group of commands: ++str_pStuff = 0 +str_tData = 2 +str_bCount = 258 str_SIZEOF = 259There are four commands in the RS group of commands:
-
- - Note that a colon (:) following the symbol-name is not allowed. - RS symbols cannot be exported and imported. - They don't change their value during the link process. -- -- - Command -Meaning ++ -Command +Meaning - RSRESET -Resets the _RS counter to zero. ++ -+ RSRESETResets the _RS counter to zero. - RSSET - constexpr -Sets the _RS - counter to - constexpr. ++ -+ RSSET+ constexprSets the _RScounter + to constexpr.- RB - constexpr -Sets the preceding symbol to - _RS and adds - constexpr to - _RS. ++ -+ RB+ constexprSets the preceding symbol to _RS+ and adds constexpr + to_RS.- RW - constexpr -Sets the preceding symbol to - _RS and adds - constexpr * 2 - to _RS. ++ -+ RW+ constexprSets the preceding symbol to _RS+ and adds constexpr + * 2 to_RS.- RL - constexpr -Sets the preceding symbol to - _RS and adds - constexpr * 4 - to _RS. ++ + RL+ constexprSets the preceding symbol to _RS+ and adds constexpr + * 4 to_RS.- EQUS
-- - - EQUS is used to define string-symbols. Wherever the assembler meets a string - symbol its name is replaced with its value. If you are familiar with C you - can think of it as the same as #define . - -
--COUNTREG EQUS "[hl+]" - ld a,COUNTREG - -PLAYER_NAME EQUS "\"John\"" +Note that a colon (:) following the symbol-name is not + allowed. RS symbols cannot be exported and imported. + They don't change their value during the link process.
+ +- EQUS
+- +
EQUS is used to define string-symbols. Wherever the assembler + meets a string symbol its name is replaced with its value. If you are + familiar with C you can think of it as the same as +
+#define .+- - Note that : following the label-name is not allowed, and that strings must - be quoted to be useful. - - This will be interpreted as: - -+COUNTREG EQUS "[hl+]" + ld a,COUNTREG + +PLAYER_NAME EQUS "\"John\"" db PLAYER_NAME-- ld a,[hl+] +Note that : following the label-name is not allowed, and that + strings must be quoted to be useful.
+This will be interpreted as:
++- - String-symbols can also be used to define small one-line macros: - -+ ld a,[hl+] db "John"-+String-symbols can also be used to define small one-line + macros:
++- - Note that a colon (:) following the label-name is not allowed. String - equates can't be exported or imported. - - Important note: An EQUS can be expanded to a - string that contains another EQUS and it will be expanded as well. This - means that, if you aren't careful, you may trap the assembler into an - infinite loop if there's a circular dependency in the expansions. Also, a - MACRO can have inside an EQUS which references the same MACRO, which has - the same problem. -PUSHA EQUS "push af\npush bc\npush de\npush hl\n"- MACRO
-- - - One of the best features of an assembler is the ability to write macros for - it. Macros also provide a method of passing arguments to them and they can - then react to the input using IF-constructs. - -
--MyMacro: MACRO - ld a,80 - call MyFunc +Note that a colon (:) following the label-name is not allowed. + String equates can't be exported or imported.
+Important note: An EQUS can be expanded to a + string that contains another EQUS and it will be expanded as well. This + means that, if you aren't careful, you may trap the assembler into an + infinite loop if there's a circular dependency in the expansions. Also, + a MACRO can have inside an EQUS which references the same MACRO, which + has the same problem.
+ +- MACRO
+- +
One of the best features of an assembler is the ability to + write macros for it. Macros also provide a method of passing arguments + to them and they can then react to the input using IF-constructs.
++- - Note that a colon (:) following the macro-name is required. Macros can't be - exported or imported. It's valid to call a macro from a macro (yes, even - the same one). - - The above example is a very simple macro. You execute the macro by typing - its name. - -+MyMacro: MACRO + ld a,80 + call MyFunc ENDM-- add a,b - ld sp,hl - MyMacro ;This will be expanded +Note that a colon (:) following the macro-name is required. + Macros can't be exported or imported. It's valid to call a macro from a + macro (yes, even the same one).
+The above example is a very simple macro. You execute the + macro by typing its name.
++- - When the assembler meets MyMacro it will insert the macrodefinition (the - text enclosed in MACRO / - ENDM). - - Suppose your macro contains a loop. - -+ add a,b + ld sp,hl + MyMacro ;This will be expanded sub a,87--LoopyMacro: MACRO - xor a,a -.loop ld [hl+],a - dec c - jr nz,.loop +When the assembler meets MyMacro it will insert the + macrodefinition (the text enclosed in
+MACRO/ +ENDM).Suppose your macro contains a loop.
++- - This is fine. That is, if you only use the macro once per scope. To get - around this problem there is a special label string equate called - \@ that you can append to your labels and it - will then expand to a unique string. - - \@ also works in REPT-blocks should you have - any loops there. - -+LoopyMacro: MACRO + xor a,a +.loop ld [hl+],a + dec c + jr nz,.loop ENDM--LoopyMacro: MACRO - xor a,a -.loop\@ ld [hl+],a - dec c - jr nz,.loop\@ +This is fine. That is, if you only use the macro once per + scope. To get around this problem there is a special label string equate + called
+\@that you can append to your labels and + it will then expand to a unique string.+
\@also works in REPT-blocks should + you have any loops there.+- - Important note: Since a MACRO can call itself - (or a different MACRO that calls the first one) there can be problems of - circular dependency. They trap the assembler in an infinite loop, so you - have to be careful when using recursion with MACROs. Also, a MACRO can - have inside an EQUS which references the same MACRO, which has the same - problem. - - Macro Arguments - - I'd like LoopyMacro a lot better if I didn't have to pre-load the registers - with values and then call it. What I'd like is the ability to pass it - arguments and it then loaded the registers itself. - - And I can do that. In macros you can get the arguments by using the special - macro string equates \1 through - \9, \1 being the - first argument specified on the calling of the macro. - -+LoopyMacro: MACRO + xor a,a +.loop\@ ld [hl+],a + dec c + jr nz,.loop\@ ENDM--LoopyMacro: MACRO - ld hl,\1 - ld c,\2 - xor a,a -.loop\@ ld [hl+],a - dec c - jr nz,.loop\@ +Important note: Since a MACRO can call + itself (or a different MACRO that calls the first one) there can be + problems of circular dependency. They trap the assembler in an infinite + loop, so you have to be careful when using recursion with MACROs. Also, + a MACRO can have inside an EQUS which references the same MACRO, which + has the same problem.
+Macro Arguments
+I'd like LoopyMacro a lot better if I didn't have to pre-load + the registers with values and then call it. What I'd like is the ability + to pass it arguments and it then loaded the registers itself.
+And I can do that. In macros you can get the arguments by + using the special macro string equates
+\1+ through\9,\1being the + first argument specified on the calling of the macro.+- - Now I can call the macro specifying two arguments. The first being the - address and the second being a bytecount. The macro will then reset all - bytes in this range. - -+LoopyMacro: MACRO + ld hl,\1 + ld c,\2 + xor a,a +.loop\@ ld [hl+],a + dec c + jr nz,.loop\@ ENDM-+Now I can call the macro specifying two arguments. The first + being the address and the second being a bytecount. The macro will then + reset all bytes in this range.
++- - Arguments are passed as string equates. There's no need to enclose them in - quotes. An expression will not be evaluated first but passed directly. - This means that it's probably a very good idea to use brackets around - \1 to \9 if you - perform further calculations on them. For instance, if you pass 1 + 2 as - the first argument and then do PRINTV - \1 * 2 you will get the value 5 on screen and - not 6 as you might have expected. - - In reality, up to 256 arguments can be passed to a macro, but you can only - use the first 9 like this. If you want to use the rest, you need to use - the keyword SHIFT. - - Line continuations work as usual inside macros or lists of arguments of - macros. Strings, however, are a bit trickier. The following example shows - how to use strings as arguments for a macro: - -LoopyMacro MyVars,54--PrintMacro : MACRO - PRINTT \1 -ENDM - - PrintMacro STRCAT(\"Hello\"\, \ +Arguments are passed as string equates. There's no need to + enclose them in quotes. An expression will not be evaluated first but + passed directly. This means that it's probably a very good idea to use + brackets around
+\1to\9+ if you perform further calculations on them. For instance, if you pass 1 + + 2 as the first argument and then doPRINTV+\1* 2 you will get the value 5 on screen and + not 6 as you might have expected.In reality, up to 256 arguments can be passed to a macro, but + you can only use the first 9 like this. If you want to use the rest, you + need to use the keyword
+SHIFT.Line continuations work as usual inside macros or lists of + arguments of macros. Strings, however, are a bit trickier. The following + example shows how to use strings as arguments for a macro:
++- - SHIFT is a special command only available in - macros. Very useful in REPT-blocks. It will shift the arguments by one to - the left. \1 will get the value of - \2, \2 will get - the value in \3 and so forth. - - This is the only way of accessing the value of arguments from 10 to - 256. ++PrintMacro : MACRO + PRINTT \1 +ENDM + + PrintMacro STRCAT(\"Hello\"\, \ \" world\\n\")+
SHIFTis a special command only + available in macros. Very useful in REPT-blocks. It will shift the + arguments by one to the left.\1will get the + value of\2,\2will get + the value in\3and so forth.This is the only way of accessing the value of arguments from + 10 to 256.
+ -Exporting + +
+ +Exporting and importing symbols
Importing and exporting of symbols is a feature that is very useful when your project spans many source-files and, for example, you need to jump to a routine defined in another file. - -Exporting of symbols has to be done manually, importing is done automatically if - the assembler doesn't know where a symbol is defined. - -EXPORT label [, - label , ...] - -The assembler will make label accessible to other files during the link process. - -GLOBAL label [, - label , ...] - -If label is defined during the assembly it will be exported, if not, it will be - imported. Handy (very!) for include-files. Note that, since importing is done - automatically, this keyword has the same effect as - EXPORT. -Purging +
Exporting of symbols has to be done manually, importing is done + automatically if the assembler doesn't know where a symbol is defined.
++
EXPORTlabel [, + label , ...]The assembler will make label accessible to other files during the + link process.
++
GLOBALlabel [, + label , ...]If label is defined during the assembly it will be exported, if + not, it will be imported. Handy (very!) for include-files. Note that, since + importing is done automatically, this keyword has the same effect as +
+EXPORT.+ Purging symbols
-PURGE allows you to completely remove a symbol from - the symbol table as if it had never existed. USE WITH EXTREME CAUTION!!! I - can't stress this enough, you seriously need to know what you are doing. DON'T - purge symbol that you use in expressions the linker needs to calculate. In - fact, it's probably not even safe to purge anything other than string symbols - and macros. - ---Kamikaze EQUS "I don't want to live anymore" -AOLer EQUS "Me too" +PURGEallows you to completely remove a symbol from the + symbol table as if it had never existed. USE WITH EXTREME CAUTION!!! I can't + stress this enough, you seriously need to know what you are doing. DON'T purge + symbol that you use in expressions the linker needs to calculate. In fact, + it's probably not even safe to purge anything other than string symbols and + macros. ++- -Note that string symbols that are part of a PURGE - command WILL NOT BE EXPANDED as the ONLY exception to this rule. -+Kamikaze EQUS "I don't want to live anymore" +AOLer EQUS "Me too" PURGE Kamikaze, AOLerPredeclared +
Note that string symbols that are part of a +
+ +PURGEcommand WILL NOT BE EXPANDED as the ONLY + exception to this rule.+ Predeclared Symbols
The following symbols are defined by the assembler: -