mirror of
https://github.com/gbdev/rgbds.git
synced 2025-11-20 18:22:07 +00:00
Make some error messages more consistent (#1393)
* Update some error messages * Make non-A destination operand syntactically invalid
This commit is contained in:
101
src/asm/parser.y
101
src/asm/parser.y
@@ -108,7 +108,8 @@
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%type <int32_t> const_8bit
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%type <int32_t> const_8bit
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%type <int32_t> uconst
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%type <int32_t> uconst
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%type <int32_t> rs_uconst
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%type <int32_t> rs_uconst
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%type <int32_t> const_3bit
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%type <int32_t> shift_const
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%type <int32_t> bit_const
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%type <Expression> reloc_8bit
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%type <Expression> reloc_8bit
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%type <Expression> reloc_8bit_no_str
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%type <Expression> reloc_8bit_no_str
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%type <Expression> reloc_8bit_offset
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%type <Expression> reloc_8bit_offset
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@@ -288,6 +289,8 @@
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%token CC_NZ "nz" CC_Z "z" CC_NC "nc" // There is no CC_C, only TOKEN_C
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%token CC_NZ "nz" CC_Z "z" CC_NC "nc" // There is no CC_C, only TOKEN_C
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%type <int32_t> reg_r
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%type <int32_t> reg_r
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%type <int32_t> reg_r_no_a
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%type <int32_t> reg_a
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%type <int32_t> reg_ss
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%type <int32_t> reg_ss
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%type <int32_t> reg_rr
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%type <int32_t> reg_rr
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%type <int32_t> reg_tt
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%type <int32_t> reg_tt
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@@ -735,14 +738,7 @@ assert:
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;
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;
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shift:
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shift:
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POP_SHIFT {
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POP_SHIFT shift_const {
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if (MacroArgs *macroArgs = fstk_GetCurrentMacroArgs(); macroArgs) {
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macroArgs->shiftArgs(1);
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} else {
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::error("Cannot shift macro arguments outside of a macro\n");
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}
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}
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| POP_SHIFT const {
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if (MacroArgs *macroArgs = fstk_GetCurrentMacroArgs(); macroArgs) {
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if (MacroArgs *macroArgs = fstk_GetCurrentMacroArgs(); macroArgs) {
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macroArgs->shiftArgs($2);
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macroArgs->shiftArgs($2);
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} else {
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} else {
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@@ -751,6 +747,13 @@ shift:
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}
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}
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;
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;
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shift_const:
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%empty {
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$$ = 1;
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}
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| const
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;
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load:
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load:
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POP_LOAD sect_mod string COMMA sect_type sect_org sect_attrs {
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POP_LOAD sect_mod string COMMA sect_type sect_org sect_attrs {
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sect_SetLoadSection($3, (SectionType)$5, $6, $7, $2);
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sect_SetLoadSection($3, (SectionType)$5, $6, $7, $2);
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@@ -1097,15 +1100,12 @@ print_expr:
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}
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}
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;
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;
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const_3bit:
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bit_const:
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const {
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const {
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int32_t value = $1;
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$$ = $1;
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if ($$ < 0 || $$ > 7) {
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if ((value < 0) || (value > 7)) {
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::error("Bit number must be between 0 and 7, not %" PRId32 "\n", $$);
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::error("Immediate value must be 3-bit\n");
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$$ = 0;
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$$ = 0;
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} else {
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$$ = value & 0x7;
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}
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}
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}
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}
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;
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;
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@@ -1436,7 +1436,7 @@ opt_q_arg:
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| COMMA const {
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| COMMA const {
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$$ = $2;
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$$ = $2;
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if ($$ < 1 || $$ > 31) {
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if ($$ < 1 || $$ > 31) {
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::error("Fixed-point precision must be between 1 and 31\n");
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::error("Fixed-point precision must be between 1 and 31, not %" PRId32 "\n", $$);
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$$ = fix_Precision();
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$$ = fix_Precision();
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}
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}
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}
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}
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@@ -1698,7 +1698,7 @@ z80_and:
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;
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;
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z80_bit:
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z80_bit:
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Z80_BIT const_3bit COMMA reg_r {
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Z80_BIT bit_const COMMA reg_r {
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sect_AbsByte(0xCB);
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sect_AbsByte(0xCB);
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sect_AbsByte(0x40 | ($2 << 3) | $4);
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sect_AbsByte(0x40 | ($2 << 3) | $4);
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}
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}
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@@ -1846,19 +1846,20 @@ z80_ldio:
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c_ind:
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c_ind:
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LBRACK MODE_C RBRACK
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LBRACK MODE_C RBRACK
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| LBRACK relocexpr OP_ADD MODE_C RBRACK {
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| LBRACK relocexpr OP_ADD MODE_C RBRACK {
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if (!$2.isKnown() || $2.value() != 0xFF00)
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// This has to use `relocexpr`, not `const`, to avoid a shift/reduce conflict
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::error("Expected constant expression equal to $FF00 for \"$ff00+c\"\n");
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if ($2.getConstVal() != 0xFF00)
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::error("Base value must be equal to $FF00 for $FF00+C\n");
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}
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}
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;
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;
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z80_ld:
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z80_ld:
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z80_ld_mem
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z80_ld_mem
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| z80_ld_cind
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| z80_ld_c_ind
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| z80_ld_rr
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| z80_ld_rr
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| z80_ld_ss
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| z80_ld_ss
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| z80_ld_hl
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| z80_ld_hl
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| z80_ld_sp
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| z80_ld_sp
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| z80_ld_r
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| z80_ld_r_no_a
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| z80_ld_a
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| z80_ld_a
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;
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;
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@@ -1894,7 +1895,7 @@ z80_ld_mem:
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}
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}
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;
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;
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z80_ld_cind:
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z80_ld_c_ind:
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Z80_LD c_ind COMMA MODE_A {
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Z80_LD c_ind COMMA MODE_A {
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sect_AbsByte(0xE2);
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sect_AbsByte(0xE2);
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}
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}
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@@ -1906,39 +1907,36 @@ z80_ld_rr:
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}
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}
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;
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;
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z80_ld_r:
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z80_ld_r_no_a:
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Z80_LD reg_r COMMA reloc_8bit {
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Z80_LD reg_r_no_a COMMA reloc_8bit {
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sect_AbsByte(0x06 | ($2 << 3));
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sect_AbsByte(0x06 | ($2 << 3));
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sect_RelByte($4, 1);
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sect_RelByte($4, 1);
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}
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}
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| Z80_LD reg_r COMMA reg_r {
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| Z80_LD reg_r_no_a COMMA reg_r {
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if (($2 == REG_HL_IND) && ($4 == REG_HL_IND))
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if ($2 == REG_HL_IND && $4 == REG_HL_IND)
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::error("LD [HL],[HL] not a valid instruction\n");
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::error("LD [HL], [HL] is not a valid instruction\n");
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else
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else
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sect_AbsByte(0x40 | ($2 << 3) | $4);
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sect_AbsByte(0x40 | ($2 << 3) | $4);
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}
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}
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;
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;
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z80_ld_a:
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z80_ld_a:
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Z80_LD reg_r COMMA c_ind {
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Z80_LD reg_a COMMA reloc_8bit {
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if ($2 == REG_A)
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sect_AbsByte(0x06 | ($2 << 3));
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sect_AbsByte(0xF2);
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sect_RelByte($4, 1);
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else
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::error("Destination operand must be A\n");
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}
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}
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| Z80_LD reg_r COMMA reg_rr {
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| Z80_LD reg_a COMMA reg_r {
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if ($2 == REG_A)
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sect_AbsByte(0x40 | ($2 << 3) | $4);
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sect_AbsByte(0x0A | ($4 << 4));
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else
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::error("Destination operand must be A\n");
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}
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}
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| Z80_LD reg_r COMMA op_mem_ind {
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| Z80_LD reg_a COMMA c_ind {
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if ($2 == REG_A) {
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sect_AbsByte(0xF2);
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sect_AbsByte(0xFA);
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}
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sect_RelWord($4, 1);
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| Z80_LD reg_a COMMA reg_rr {
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} else {
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sect_AbsByte(0x0A | ($4 << 4));
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::error("Destination operand must be A\n");
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}
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}
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| Z80_LD reg_a COMMA op_mem_ind {
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sect_AbsByte(0xFA);
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sect_RelWord($4, 1);
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}
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}
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;
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;
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@@ -1984,7 +1982,7 @@ z80_push:
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;
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;
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z80_res:
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z80_res:
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Z80_RES const_3bit COMMA reg_r {
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Z80_RES bit_const COMMA reg_r {
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sect_AbsByte(0xCB);
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sect_AbsByte(0xCB);
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sect_AbsByte(0x80 | ($2 << 3) | $4);
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sect_AbsByte(0x80 | ($2 << 3) | $4);
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}
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}
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@@ -2084,7 +2082,7 @@ z80_scf:
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;
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;
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z80_set:
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z80_set:
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Z80_SET const_3bit COMMA reg_r {
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Z80_SET bit_const COMMA reg_r {
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sect_AbsByte(0xCB);
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sect_AbsByte(0xCB);
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sect_AbsByte(0xC0 | ($2 << 3) | $4);
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sect_AbsByte(0xC0 | ($2 << 3) | $4);
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}
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}
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@@ -2232,7 +2230,9 @@ ccode:
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}
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}
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;
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;
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reg_r:
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reg_r: reg_r_no_a | reg_a;
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reg_r_no_a:
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MODE_B {
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MODE_B {
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$$ = REG_B;
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$$ = REG_B;
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}
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}
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@@ -2254,7 +2254,10 @@ reg_r:
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| LBRACK MODE_HL RBRACK {
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| LBRACK MODE_HL RBRACK {
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$$ = REG_HL_IND;
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$$ = REG_HL_IND;
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}
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}
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| MODE_A {
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;
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reg_a:
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MODE_A {
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$$ = REG_A;
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$$ = REG_A;
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}
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}
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;
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;
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@@ -817,7 +817,11 @@ void sect_PCRelByte(Expression &expr, uint32_t pcShift) {
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offset = sym->getValue() - (pc->getValue() + 1);
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offset = sym->getValue() - (pc->getValue() + 1);
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if (offset < -128 || offset > 127) {
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if (offset < -128 || offset > 127) {
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error("jr target out of reach (expected -129 < %" PRId16 " < 128)\n", offset);
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error(
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"jr target must be between -128 and 127 bytes away, not %" PRId16
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"; use jp instead\n",
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offset
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);
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writebyte(0);
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writebyte(0);
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} else {
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} else {
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writebyte(offset);
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writebyte(offset);
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@@ -461,7 +461,8 @@ static void applyFilePatches(Section §ion, Section &dataSection) {
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error(
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error(
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patch.src,
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patch.src,
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patch.lineNo,
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patch.lineNo,
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"jr target out of reach (expected -129 < %" PRId16 " < 128)",
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"jr target must be between -128 and 127 bytes away, not %" PRId16
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"; use jp instead\n",
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jumpOffset
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jumpOffset
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);
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);
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dataSection.data[offset] = jumpOffset & 0xFF;
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dataSection.data[offset] = jumpOffset & 0xFF;
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@@ -1,5 +1,7 @@
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error: ff00+c-bad.asm(8):
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error: ff00+c-bad.asm(8):
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Expected constant expression equal to $FF00 for "$ff00+c"
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Base value must be equal to $FF00 for $FF00+C
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error: ff00+c-bad.asm(9):
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error: ff00+c-bad.asm(9):
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Expected constant expression equal to $FF00 for "$ff00+c"
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Expected constant expression: 'xyz' is not constant at assembly time
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error: Assembly aborted (2 errors)!
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error: ff00+c-bad.asm(9):
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Base value must be equal to $FF00 for $FF00+C
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error: Assembly aborted (3 errors)!
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@@ -1,17 +1,17 @@
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error: invalid-instructions.asm(1):
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error: invalid-instructions.asm(1):
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Address $10000 is not 16-bit
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Address $10000 is not 16-bit
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error: invalid-instructions.asm(2):
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error: invalid-instructions.asm(2):
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LD [HL],[HL] not a valid instruction
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LD [HL], [HL] is not a valid instruction
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error: invalid-instructions.asm(3):
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error: invalid-instructions.asm(3):
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Expected constant expression equal to $FF00 for "$ff00+c"
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Base value must be equal to $FF00 for $FF00+C
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error: invalid-instructions.asm(4):
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error: invalid-instructions.asm(4):
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Destination operand must be A
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syntax error, unexpected c, expecting hl
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error: invalid-instructions.asm(5):
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error: invalid-instructions.asm(5):
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Destination operand must be A
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syntax error, unexpected bc, expecting hl
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error: invalid-instructions.asm(6):
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error: invalid-instructions.asm(6):
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Destination operand must be A
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syntax error, unexpected number, expecting hl
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error: invalid-instructions.asm(7):
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error: invalid-instructions.asm(7):
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Immediate value must be 3-bit
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Bit number must be between 0 and 7, not 8
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error: invalid-instructions.asm(8):
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error: invalid-instructions.asm(8):
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Invalid address $40 for RST
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Invalid address $40 for RST
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error: Assembly aborted (8 errors)!
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error: Assembly aborted (8 errors)!
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@@ -1,3 +1,3 @@
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error: invalid-jr.asm(3):
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error: invalid-jr.asm(3):
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jr target out of reach (expected -129 < -258 < 128)
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jr target must be between -128 and 127 bytes away, not -258; use jp instead
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error: Assembly aborted (1 error)!
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error: Assembly aborted (1 error)!
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Block a user