From 57f122a04ec09298e82a23a9f833b5829a73d792 Mon Sep 17 00:00:00 2001
From: Sylvie <35663410+Rangi42@users.noreply.github.com>
Date: Mon, 19 Aug 2024 12:56:16 -0400
Subject: [PATCH] Document `!cc` support alongside `HIGH(r16)` and `LOW(r16)`
 support (#1475)

---
 man/gbz80.7  |  2 --
 man/rgbasm.5 | 21 ++++++++++++++++++++-
 2 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/man/gbz80.7 b/man/gbz80.7
index 662ae729..7230cc82 100644
--- a/man/gbz80.7
+++ b/man/gbz80.7
@@ -57,8 +57,6 @@ Execute if Z is not set.
 Execute if C is set.
 .It Sy NC
 Execute if C is not set.
-.It Sy ! cc
-Negates a condition code.
 .El
 .It Ar vec
 One of the
diff --git a/man/rgbasm.5 b/man/rgbasm.5
index b81142a7..92bb5cf9 100644
--- a/man/rgbasm.5
+++ b/man/rgbasm.5
@@ -49,6 +49,7 @@ Multiple instructions on one line can be separated by double colons
 .Pp
 The available instructions are documented in
 .Xr gbz80 7 .
+.Pp
 Note that where an instruction requires an 8-bit register
 .Ar r8 ,
 .Nm
@@ -56,14 +57,32 @@ can interpret
 .Ic HIGH Ns Pq Ar r16
 as the top 8-bit register of the given
 .Ar r16 ,
+for example,
+.Ic HIGH Ns Pq Ic HL
+for
+.Ic H ;
 and
 .Ic LOW Ns Pq Ar r16
-as the bottom one (except for
+as the bottom one, for example,
+.Ic LOW Ns Pq Ic HL
+for
+.Ic L
+(except for
 .Ic LOW Ns Pq Ic AF ,
 since
 .Ic F
 is not a valid register).
 .Pp
+Note also that where an instruction requires a condition code
+.Ar cc ,
+.Nm
+can interpret
+.Ic ! Ns Ar cc
+as the opposite condition code; for example,
+.Ic !nz
+for
+.Ic z .
+.Pp
 All reserved keywords (directives, register names, etc.) are case-insensitive;
 all identifiers (labels and other symbol names) are case-sensitive.
 .Pp