Switch line terminators from CRLF to LF

Argh, that obnoxious platform again... ;-)

Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
This commit is contained in:
Vegard Nossum
2009-06-11 07:32:12 +02:00
parent 0d9739535e
commit 94fad97aed
50 changed files with 10581 additions and 10581 deletions

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@@ -1,154 +1,154 @@
/* GB Z80 instruction groups
n3 = 3-bit
n = 8-bit
nn = 16-bit
*ADC A,n : 0xCE
*ADC A,r : 0x88|r
*ADD A,n : 0xC6
*ADD A,r : 0x80|r
*ADD HL,ss : 0x09|(ss<<4)
*ADD SP,n : 0xE8
*AND A,n : 0xE6
*AND A,r : 0xA0|r
*BIT n3,r : 0xCB 0x40|(n3<<3)|r
*CALL cc,nn : 0xC4|(cc<<3)
*CALL nn : 0xCD
*CCF : 0x3F
*CP A,n : 0xFE
*CP A,r : 0xB8|r
*CPL : 0x2F
*DAA : 0x27
*DEC r : 0x05|(r<<3)
*DEC ss : 0x0B|(ss<<4)
*DI : 0xF3
*EI : 0xFB
*EX HL,(SP) : 0xE3
*HALT : 0x76
*INC r : 0x04|(r<<3)
*INC ss : 0x03|(ss<<4)
*JP (HL) : 0xE9
*JP cc,nn : 0xC2|(cc<<3)
*JP nn : 0xC3|(cc<<3)
*JR n : 0x18
*JR cc,n : 0x20|(cc<<3)
*LD (nn),SP : 0x08
*LD ($FF00+C),A : 0xE2
*LD ($FF00+n),A : 0xE0
*LD (nn),A : 0xEA
*LD (rr),A : 0x02|(rr<<4)
*LD A,($FF00+C) : 0xF2
*LD A,($FF00+n) : 0xF0
*LD A,(nn) : 0xFA
*LD A,(rr) : 0x0A|(rr<<4)
*LD HL,(SP+n) : 0xF8
*LD SP,HL : 0xF9
*LD r,n : 0x06|(r<<3)
*LD r,r' : 0x40|(r<<3)|r' // NOTE: LD (HL),(HL) not allowed
*LD ss,nn : 0x01|(ss<<4)
*NOP : 0x00
*OR A,n : 0xF6
*OR A,r : 0xB0|r
*POP tt : 0xC1|(tt<<4)
*PUSH tt : 0xC5|(tt<<4)
*RES n3,r : 0xCB 0x80|(n3<<3)|r
*RET : 0xC9
*RET cc : 0xC0|(cc<<3)
*RETI : 0xD9
*RL r : 0xCB 0x10|r
*RLA : 0x17
*RLC r : 0xCB 0x00|r
*RLCA : 0x07
*RR r : 0xCB 0x18|r
*RRA : 0x1F
*RRC r : 0xCB 0x08|r
*RRCA : 0x0F
*RST n : 0xC7|n
*SBC A,n : 0xDE
*SBC A,r : 0x98|r
*SCF : 0x37
*SET n3,r : 0xCB 0xC0|(n8<<3)|r
*SLA r : 0xCB 0x20|r
*SRA r : 0xCB 0x28|r
*SRL r : 0xCB 0x38|r
*STOP : 0x10
*SUB A,n : 0xD6
*SUB A,r : 0x90|r
*SWAP r : 0xCB 0x30|r
*XOR A,n : 0xEE
*XOR A,r : 0xA8|r
*/
#define MAXSECTIONSIZE 0x4000
#define ASM_DEFAULT_ENDIAN ASM_LITTLE_ENDIAN
#define APPNAME "RGBAsm"
#define EXENAME "rgbasm"
#define NAME_DB "db"
#define NAME_DW "dw"
#define NAME_RB "rb"
#define NAME_RW "rw"
/* "r" defs */
enum
{
REG_B=0,
REG_C,
REG_D,
REG_E,
REG_H,
REG_L,
REG_HL_IND,
REG_A
};
/* "rr" defs */
enum
{
REG_BC_IND=0,
REG_DE_IND,
REG_HL_INDINC,
REG_HL_INDDEC,
};
/* "ss" defs */
enum
{
REG_BC=0,
REG_DE,
REG_HL,
REG_SP
};
/* "tt" defs */
/*
#define REG_BC 0
#define REG_DE 1
#define REG_HL 2
*/
#define REG_AF 3
/* "cc" defs */
enum
{
CC_NZ=0,
CC_Z,
CC_NC,
CC_C
};
/* GB Z80 instruction groups
n3 = 3-bit
n = 8-bit
nn = 16-bit
*ADC A,n : 0xCE
*ADC A,r : 0x88|r
*ADD A,n : 0xC6
*ADD A,r : 0x80|r
*ADD HL,ss : 0x09|(ss<<4)
*ADD SP,n : 0xE8
*AND A,n : 0xE6
*AND A,r : 0xA0|r
*BIT n3,r : 0xCB 0x40|(n3<<3)|r
*CALL cc,nn : 0xC4|(cc<<3)
*CALL nn : 0xCD
*CCF : 0x3F
*CP A,n : 0xFE
*CP A,r : 0xB8|r
*CPL : 0x2F
*DAA : 0x27
*DEC r : 0x05|(r<<3)
*DEC ss : 0x0B|(ss<<4)
*DI : 0xF3
*EI : 0xFB
*EX HL,(SP) : 0xE3
*HALT : 0x76
*INC r : 0x04|(r<<3)
*INC ss : 0x03|(ss<<4)
*JP (HL) : 0xE9
*JP cc,nn : 0xC2|(cc<<3)
*JP nn : 0xC3|(cc<<3)
*JR n : 0x18
*JR cc,n : 0x20|(cc<<3)
*LD (nn),SP : 0x08
*LD ($FF00+C),A : 0xE2
*LD ($FF00+n),A : 0xE0
*LD (nn),A : 0xEA
*LD (rr),A : 0x02|(rr<<4)
*LD A,($FF00+C) : 0xF2
*LD A,($FF00+n) : 0xF0
*LD A,(nn) : 0xFA
*LD A,(rr) : 0x0A|(rr<<4)
*LD HL,(SP+n) : 0xF8
*LD SP,HL : 0xF9
*LD r,n : 0x06|(r<<3)
*LD r,r' : 0x40|(r<<3)|r' // NOTE: LD (HL),(HL) not allowed
*LD ss,nn : 0x01|(ss<<4)
*NOP : 0x00
*OR A,n : 0xF6
*OR A,r : 0xB0|r
*POP tt : 0xC1|(tt<<4)
*PUSH tt : 0xC5|(tt<<4)
*RES n3,r : 0xCB 0x80|(n3<<3)|r
*RET : 0xC9
*RET cc : 0xC0|(cc<<3)
*RETI : 0xD9
*RL r : 0xCB 0x10|r
*RLA : 0x17
*RLC r : 0xCB 0x00|r
*RLCA : 0x07
*RR r : 0xCB 0x18|r
*RRA : 0x1F
*RRC r : 0xCB 0x08|r
*RRCA : 0x0F
*RST n : 0xC7|n
*SBC A,n : 0xDE
*SBC A,r : 0x98|r
*SCF : 0x37
*SET n3,r : 0xCB 0xC0|(n8<<3)|r
*SLA r : 0xCB 0x20|r
*SRA r : 0xCB 0x28|r
*SRL r : 0xCB 0x38|r
*STOP : 0x10
*SUB A,n : 0xD6
*SUB A,r : 0x90|r
*SWAP r : 0xCB 0x30|r
*XOR A,n : 0xEE
*XOR A,r : 0xA8|r
*/
#define MAXSECTIONSIZE 0x4000
#define ASM_DEFAULT_ENDIAN ASM_LITTLE_ENDIAN
#define APPNAME "RGBAsm"
#define EXENAME "rgbasm"
#define NAME_DB "db"
#define NAME_DW "dw"
#define NAME_RB "rb"
#define NAME_RW "rw"
/* "r" defs */
enum
{
REG_B=0,
REG_C,
REG_D,
REG_E,
REG_H,
REG_L,
REG_HL_IND,
REG_A
};
/* "rr" defs */
enum
{
REG_BC_IND=0,
REG_DE_IND,
REG_HL_INDINC,
REG_HL_INDDEC,
};
/* "ss" defs */
enum
{
REG_BC=0,
REG_DE,
REG_HL,
REG_SP
};
/* "tt" defs */
/*
#define REG_BC 0
#define REG_DE 1
#define REG_HL 2
*/
#define REG_AF 3
/* "cc" defs */
enum
{
CC_NZ=0,
CC_Z,
CC_NC,
CC_C
};

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@@ -1,89 +1,89 @@
#include "symbol.h"
#include "lexer.h"
#include "rpn.h"
#include "asmy.h"
struct sLexInitString localstrings[] =
{
"adc", T_Z80_ADC,
"add", T_Z80_ADD,
"and", T_Z80_AND,
"bit", T_Z80_BIT,
"call", T_Z80_CALL,
"ccf", T_Z80_CCF,
"cpl", T_Z80_CPL,
"cp", T_Z80_CP,
"daa", T_Z80_DAA,
"dec", T_Z80_DEC,
"di", T_Z80_DI,
"ei", T_Z80_EI,
"ex", T_Z80_EX,
"halt", T_Z80_HALT,
"inc", T_Z80_INC,
"jp", T_Z80_JP,
"jr", T_Z80_JR,
"ld", T_Z80_LD,
"ldi", T_Z80_LDI,
"ldd", T_Z80_LDD,
"ldio", T_Z80_LDIO,
"ldh", T_Z80_LDIO,
"nop", T_Z80_NOP,
"or", T_Z80_OR,
"pop", T_Z80_POP,
"push", T_Z80_PUSH,
"res", T_Z80_RES,
"reti", T_Z80_RETI,
"ret", T_Z80_RET,
"rlca", T_Z80_RLCA,
"rlc", T_Z80_RLC,
"rla", T_Z80_RLA,
"rl", T_Z80_RL,
"rrc", T_Z80_RRC,
"rrca", T_Z80_RRCA,
"rra", T_Z80_RRA,
"rr", T_Z80_RR,
"rst", T_Z80_RST,
"sbc", T_Z80_SBC,
"scf", T_Z80_SCF,
// Handled by globallex.c
// "set" , T_POP_SET,
"sla", T_Z80_SLA,
"sra", T_Z80_SRA,
"srl", T_Z80_SRL,
"stop", T_Z80_STOP,
"sub", T_Z80_SUB,
"swap", T_Z80_SWAP,
"xor", T_Z80_XOR,
"nz", T_CC_NZ,
"z", T_CC_Z,
"nc", T_CC_NC,
// "c" , T_MODE_C
"[hl]", T_MODE_HL_IND,
"[hl+]", T_MODE_HL_INDINC,
"[hl-]", T_MODE_HL_INDDEC,
"[hli]", T_MODE_HL_INDINC,
"[hld]", T_MODE_HL_INDDEC,
"hl", T_MODE_HL,
"af", T_MODE_AF,
"[bc]", T_MODE_BC_IND,
"bc", T_MODE_BC,
"[de]", T_MODE_DE_IND,
"de", T_MODE_DE,
"[sp]", T_MODE_SP_IND,
"sp", T_MODE_SP,
"a", T_MODE_A,
"b", T_MODE_B,
"[$ff00+c]", T_MODE_C_IND,
"[c]", T_MODE_C_IND,
"c", T_MODE_C,
"d", T_MODE_D,
"e", T_MODE_E,
"h", T_MODE_H,
"l", T_MODE_L,
NULL, 0
#include "symbol.h"
#include "lexer.h"
#include "rpn.h"
#include "asmy.h"
struct sLexInitString localstrings[] =
{
"adc", T_Z80_ADC,
"add", T_Z80_ADD,
"and", T_Z80_AND,
"bit", T_Z80_BIT,
"call", T_Z80_CALL,
"ccf", T_Z80_CCF,
"cpl", T_Z80_CPL,
"cp", T_Z80_CP,
"daa", T_Z80_DAA,
"dec", T_Z80_DEC,
"di", T_Z80_DI,
"ei", T_Z80_EI,
"ex", T_Z80_EX,
"halt", T_Z80_HALT,
"inc", T_Z80_INC,
"jp", T_Z80_JP,
"jr", T_Z80_JR,
"ld", T_Z80_LD,
"ldi", T_Z80_LDI,
"ldd", T_Z80_LDD,
"ldio", T_Z80_LDIO,
"ldh", T_Z80_LDIO,
"nop", T_Z80_NOP,
"or", T_Z80_OR,
"pop", T_Z80_POP,
"push", T_Z80_PUSH,
"res", T_Z80_RES,
"reti", T_Z80_RETI,
"ret", T_Z80_RET,
"rlca", T_Z80_RLCA,
"rlc", T_Z80_RLC,
"rla", T_Z80_RLA,
"rl", T_Z80_RL,
"rrc", T_Z80_RRC,
"rrca", T_Z80_RRCA,
"rra", T_Z80_RRA,
"rr", T_Z80_RR,
"rst", T_Z80_RST,
"sbc", T_Z80_SBC,
"scf", T_Z80_SCF,
// Handled by globallex.c
// "set" , T_POP_SET,
"sla", T_Z80_SLA,
"sra", T_Z80_SRA,
"srl", T_Z80_SRL,
"stop", T_Z80_STOP,
"sub", T_Z80_SUB,
"swap", T_Z80_SWAP,
"xor", T_Z80_XOR,
"nz", T_CC_NZ,
"z", T_CC_Z,
"nc", T_CC_NC,
// "c" , T_MODE_C
"[hl]", T_MODE_HL_IND,
"[hl+]", T_MODE_HL_INDINC,
"[hl-]", T_MODE_HL_INDDEC,
"[hli]", T_MODE_HL_INDINC,
"[hld]", T_MODE_HL_INDDEC,
"hl", T_MODE_HL,
"af", T_MODE_AF,
"[bc]", T_MODE_BC_IND,
"bc", T_MODE_BC,
"[de]", T_MODE_DE_IND,
"de", T_MODE_DE,
"[sp]", T_MODE_SP_IND,
"sp", T_MODE_SP,
"a", T_MODE_A,
"b", T_MODE_B,
"[$ff00+c]", T_MODE_C_IND,
"[c]", T_MODE_C_IND,
"c", T_MODE_C,
"d", T_MODE_D,
"e", T_MODE_E,
"h", T_MODE_H,
"l", T_MODE_L,
NULL, 0
};

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@@ -1,41 +1,41 @@
%token T_SECT_BSS T_SECT_VRAM T_SECT_CODE T_SECT_HOME T_SECT_HRAM
%token T_Z80_ADC T_Z80_ADD T_Z80_AND
%token T_Z80_BIT
%token T_Z80_CALL T_Z80_CCF T_Z80_CP T_Z80_CPL
%token T_Z80_DAA T_Z80_DEC T_Z80_DI
%token T_Z80_EI T_Z80_EX
%token T_Z80_HALT
%token T_Z80_INC
%token T_Z80_JP T_Z80_JR
%token T_Z80_LD
%token T_Z80_LDI
%token T_Z80_LDD
%token T_Z80_LDIO
%token T_Z80_NOP
%token T_Z80_OR
%token T_Z80_POP T_Z80_PUSH
%token T_Z80_RES T_Z80_RET T_Z80_RETI T_Z80_RST
%token T_Z80_RL T_Z80_RLA T_Z80_RLC T_Z80_RLCA
%token T_Z80_RR T_Z80_RRA T_Z80_RRC T_Z80_RRCA
%token T_Z80_SBC T_Z80_SCF T_Z80_STOP
%token T_Z80_SLA T_Z80_SRA T_Z80_SRL T_Z80_SUB T_Z80_SWAP
%token T_Z80_XOR
%token T_MODE_A T_MODE_B T_MODE_C T_MODE_C_IND T_MODE_D T_MODE_E T_MODE_H T_MODE_L
%token T_MODE_AF
%token T_MODE_BC T_MODE_BC_IND
%token T_MODE_DE T_MODE_DE_IND
%token T_MODE_SP T_MODE_SP_IND
%token T_MODE_HL T_MODE_HL_IND T_MODE_HL_INDDEC T_MODE_HL_INDINC
%token T_CC_NZ T_CC_Z T_CC_NC
%type <nConstValue> reg_r
%type <nConstValue> reg_ss
%type <nConstValue> reg_rr
%type <nConstValue> reg_tt
%type <nConstValue> ccode
%type <sVal> op_a_n
%type <nConstValue> op_a_r
%type <nConstValue> op_hl_ss
%type <sVal> op_mem_ind
%token T_SECT_BSS T_SECT_VRAM T_SECT_CODE T_SECT_HOME T_SECT_HRAM
%token T_Z80_ADC T_Z80_ADD T_Z80_AND
%token T_Z80_BIT
%token T_Z80_CALL T_Z80_CCF T_Z80_CP T_Z80_CPL
%token T_Z80_DAA T_Z80_DEC T_Z80_DI
%token T_Z80_EI T_Z80_EX
%token T_Z80_HALT
%token T_Z80_INC
%token T_Z80_JP T_Z80_JR
%token T_Z80_LD
%token T_Z80_LDI
%token T_Z80_LDD
%token T_Z80_LDIO
%token T_Z80_NOP
%token T_Z80_OR
%token T_Z80_POP T_Z80_PUSH
%token T_Z80_RES T_Z80_RET T_Z80_RETI T_Z80_RST
%token T_Z80_RL T_Z80_RLA T_Z80_RLC T_Z80_RLCA
%token T_Z80_RR T_Z80_RRA T_Z80_RRC T_Z80_RRCA
%token T_Z80_SBC T_Z80_SCF T_Z80_STOP
%token T_Z80_SLA T_Z80_SRA T_Z80_SRL T_Z80_SUB T_Z80_SWAP
%token T_Z80_XOR
%token T_MODE_A T_MODE_B T_MODE_C T_MODE_C_IND T_MODE_D T_MODE_E T_MODE_H T_MODE_L
%token T_MODE_AF
%token T_MODE_BC T_MODE_BC_IND
%token T_MODE_DE T_MODE_DE_IND
%token T_MODE_SP T_MODE_SP_IND
%token T_MODE_HL T_MODE_HL_IND T_MODE_HL_INDDEC T_MODE_HL_INDINC
%token T_CC_NZ T_CC_Z T_CC_NC
%type <nConstValue> reg_r
%type <nConstValue> reg_ss
%type <nConstValue> reg_rr
%type <nConstValue> reg_tt
%type <nConstValue> ccode
%type <sVal> op_a_n
%type <nConstValue> op_a_r
%type <nConstValue> op_hl_ss
%type <sVal> op_mem_ind

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@@ -1,498 +1,498 @@
section : T_POP_SECTION string ',' sectiontype
{ out_NewSection($2,$4); }
| T_POP_SECTION string ',' sectiontype '[' const ']'
{
if( $6>=0 && $6<0x10000 )
out_NewAbsSection($2,$4,$6,-1);
else
yyerror( "Address must be 16-bit" );
}
| T_POP_SECTION string ',' sectiontype ',' T_OP_BANK '[' const ']'
{
if( $4==SECT_CODE )
{
if( $8>=1 && $8<=255 )
out_NewAbsSection($2,$4,-1,$8);
else
yyerror( "BANK value out of range" );
}
else
yyerror( "BANK only allowed for CODE/DATA" );
}
| T_POP_SECTION string ',' sectiontype '[' const ']' ',' T_OP_BANK '[' const ']'
{
if( $4==SECT_CODE )
{
if( $6>=0 && $6<0x10000 )
{
if( $11>=1 && $11<=255 )
out_NewAbsSection($2,$4,$6,$11);
else
yyerror( "BANK value out of range" );
}
else
yyerror( "Address must be 16-bit" );
}
else
yyerror( "BANK only allowed for CODE/DATA" );
}
;
sectiontype : T_SECT_BSS { $$=SECT_BSS; }
| T_SECT_VRAM { $$=SECT_VRAM; }
| T_SECT_CODE { $$=SECT_CODE; }
| T_SECT_HOME { $$=SECT_HOME; }
| T_SECT_HRAM { $$=SECT_HRAM; }
;
cpu_command : z80_adc
| z80_add
| z80_and
| z80_bit
| z80_call
| z80_ccf
| z80_cp
| z80_cpl
| z80_daa
| z80_dec
| z80_di
| z80_ei
| z80_ex
| z80_halt
| z80_inc
| z80_jp
| z80_jr
| z80_ld
| z80_ldd
| z80_ldi
| z80_ldio
| z80_nop
| z80_or
| z80_pop
| z80_push
| z80_res
| z80_ret
| z80_reti
| z80_rl
| z80_rla
| z80_rlc
| z80_rlca
| z80_rr
| z80_rra
| z80_rrc
| z80_rrca
| z80_rst
| z80_sbc
| z80_scf
| z80_set
| z80_sla
| z80_sra
| z80_srl
| z80_stop
| z80_sub
| z80_swap
| z80_xor
;
z80_adc : T_Z80_ADC op_a_n { out_AbsByte(0xCE); out_RelByte(&$2); }
| T_Z80_ADC op_a_r { out_AbsByte(0x88|$2); }
;
z80_add : T_Z80_ADD op_a_n { out_AbsByte(0xC6); out_RelByte(&$2); }
| T_Z80_ADD op_a_r { out_AbsByte(0x80|$2); }
| T_Z80_ADD op_hl_ss { out_AbsByte(0x09|($2<<4)); }
| T_Z80_ADD T_MODE_SP comma const_8bit
{ out_AbsByte(0xE8); out_RelByte(&$4); }
;
z80_and : T_Z80_AND op_a_n { out_AbsByte(0xE6); out_RelByte(&$2); }
| T_Z80_AND op_a_r { out_AbsByte(0xA0|$2); }
;
z80_bit : T_Z80_BIT const_3bit comma reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x40|($2<<3)|$4); }
;
z80_call : T_Z80_CALL const_16bit
{ out_AbsByte(0xCD); out_RelWord(&$2); }
| T_Z80_CALL ccode comma const_16bit
{ out_AbsByte(0xC4|($2<<3)); out_RelWord(&$4); }
;
z80_ccf : T_Z80_CCF
{ out_AbsByte(0x3F); }
;
z80_cp : T_Z80_CP op_a_n { out_AbsByte(0xFE); out_RelByte(&$2); }
| T_Z80_CP op_a_r { out_AbsByte(0xB8|$2); }
;
z80_cpl : T_Z80_CPL { out_AbsByte(0x2F); }
;
z80_daa : T_Z80_DAA { out_AbsByte(0x27); }
;
z80_dec : T_Z80_DEC reg_r
{ out_AbsByte(0x05|($2<<3)); }
| T_Z80_DEC reg_ss
{ out_AbsByte(0x0B|($2<<4)); }
;
z80_di : T_Z80_DI
{ out_AbsByte(0xF3); }
;
z80_ei : T_Z80_EI
{ out_AbsByte(0xFB); }
;
z80_ex : T_Z80_EX T_MODE_HL comma T_MODE_SP_IND
{ out_AbsByte(0xE3); }
| T_Z80_EX T_MODE_SP_IND comma T_MODE_HL
{ out_AbsByte(0xE3); }
;
z80_halt : T_Z80_HALT
{ out_AbsByte(0x76); out_AbsByte(0x00); }
;
z80_inc : T_Z80_INC reg_r
{ out_AbsByte(0x04|($2<<3)); }
| T_Z80_INC reg_ss
{ out_AbsByte(0x03|($2<<4)); }
;
z80_jp : T_Z80_JP const_16bit
{ out_AbsByte(0xC3); out_RelWord(&$2); }
| T_Z80_JP ccode comma const_16bit
{ out_AbsByte(0xC2|($2<<3)); out_RelWord(&$4); }
| T_Z80_JP T_MODE_HL_IND
{ out_AbsByte(0xE9); }
;
z80_jr : T_Z80_JR const_PCrel
{ out_AbsByte(0x18); out_PCRelByte(&$2); }
| T_Z80_JR ccode comma const_PCrel
{ out_AbsByte(0x20|($2<<3)); out_PCRelByte(&$4); }
;
z80_ldi : T_Z80_LDI T_MODE_HL_IND comma T_MODE_A
{ out_AbsByte(0x02|(2<<4)); }
| T_Z80_LDI T_MODE_A comma T_MODE_HL
{ out_AbsByte(0x0A|(2<<4)); }
;
z80_ldd : T_Z80_LDD T_MODE_HL_IND comma T_MODE_A
{ out_AbsByte(0x02|(3<<4)); }
| T_Z80_LDD T_MODE_A comma T_MODE_HL
{ out_AbsByte(0x0A|(3<<4)); }
;
z80_ldio : T_Z80_LDIO T_MODE_A comma op_mem_ind
{
rpn_CheckHRAM(&$4,&$4);
if( (!rpn_isReloc(&$4))
&& ($4.nVal<0 || ($4.nVal>0xFF && $4.nVal<0xFF00) || $4.nVal>0xFFFF) )
{
yyerror( "Source must be in the IO/HRAM area" );
}
out_AbsByte(0xF0);
$4.nVal&=0xFF;
out_RelByte(&$4);
}
| T_Z80_LDIO op_mem_ind comma T_MODE_A
{
rpn_CheckHRAM(&$2,&$2);
if( (!rpn_isReloc(&$2))
&& ($2.nVal<0 || ($2.nVal>0xFF && $2.nVal<0xFF00) || $2.nVal>0xFFFF) )
{
yyerror( "Destination must be in the IO/HRAM area" );
}
out_AbsByte(0xE0);
$2.nVal&=0xFF;
out_RelByte(&$2);
}
;
z80_ld : z80_ld_mem
| z80_ld_cind
| z80_ld_rr
| z80_ld_ss
| z80_ld_hl
| z80_ld_sp
| z80_ld_r
| z80_ld_a
;
z80_ld_hl : T_Z80_LD T_MODE_HL comma '[' T_MODE_SP const_8bit ']'
{ out_AbsByte(0xF8); out_RelByte(&$6); }
| T_Z80_LD T_MODE_HL comma const_16bit
{ out_AbsByte(0x01|(REG_HL<<4)); out_RelWord(&$4) }
;
z80_ld_sp : T_Z80_LD T_MODE_SP comma T_MODE_HL
{ out_AbsByte(0xF9); }
| T_Z80_LD T_MODE_SP comma const_16bit
{ out_AbsByte(0x01|(REG_SP<<4)); out_RelWord(&$4) }
;
z80_ld_mem : T_Z80_LD op_mem_ind comma T_MODE_SP
{ out_AbsByte(0x08); out_RelWord(&$2); }
| T_Z80_LD op_mem_ind comma T_MODE_A
{
if( (!rpn_isReloc(&$2)) && $2.nVal>=0xFF00)
{
out_AbsByte(0xE0);
out_AbsByte($2.nVal&0xFF);
}
else
{
out_AbsByte(0xEA);
out_RelWord(&$2);
}
}
;
z80_ld_cind : T_Z80_LD T_MODE_C_IND comma T_MODE_A
{ out_AbsByte(0xE2); }
;
z80_ld_rr : T_Z80_LD reg_rr comma T_MODE_A
{ out_AbsByte(0x02|($2<<4)); }
;
z80_ld_r : T_Z80_LD reg_r comma const_8bit
{ out_AbsByte(0x06|($2<<3)); out_RelByte(&$4); }
| T_Z80_LD reg_r comma reg_r
{
if( ($2==REG_HL_IND) && ($4==REG_HL_IND) )
{
yyerror( "LD (HL),(HL) not allowed" );
}
else
out_AbsByte(0x40|($2<<3)|$4);
}
;
z80_ld_a : T_Z80_LD reg_r comma T_MODE_C_IND
{
if( $2==REG_A )
out_AbsByte(0xF2);
else
{
yyerror( "Destination operand must be A" );
}
}
| T_Z80_LD reg_r comma reg_rr
{
if( $2==REG_A )
out_AbsByte(0x0A|($4<<4));
else
{
yyerror( "Destination operand must be A" );
}
}
| T_Z80_LD reg_r comma op_mem_ind
{
if( $2==REG_A )
{
if( (!rpn_isReloc(&$4)) && $4.nVal>=0xFF00 )
{
out_AbsByte(0xF0);
out_AbsByte($4.nVal&0xFF);
}
else
{
out_AbsByte(0xFA);
out_RelWord(&$4);
}
}
else
{
yyerror( "Destination operand must be A" );
}
}
;
z80_ld_ss : T_Z80_LD reg_ss comma const_16bit
{ out_AbsByte(0x01|($2<<4)); out_RelWord(&$4) }
;
z80_nop : T_Z80_NOP
{ out_AbsByte(0x00); }
;
z80_or : T_Z80_OR op_a_n
{ out_AbsByte(0xF6); out_RelByte(&$2); }
| T_Z80_OR op_a_r
{ out_AbsByte(0xB0|$2); }
;
z80_pop : T_Z80_POP reg_tt
{ out_AbsByte(0xC1|($2<<4)); }
;
z80_push : T_Z80_PUSH reg_tt
{ out_AbsByte(0xC5|($2<<4)); }
;
z80_res : T_Z80_RES const_3bit comma reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x80|($2<<3)|$4); }
;
z80_ret : T_Z80_RET
{ out_AbsByte(0xC9); }
| T_Z80_RET ccode
{ out_AbsByte(0xC0|($2<<3)); }
;
z80_reti : T_Z80_RETI
{ out_AbsByte(0xD9); }
;
z80_rl : T_Z80_RL reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x10|$2); }
;
z80_rla : T_Z80_RLA
{ out_AbsByte(0x17); }
;
z80_rlc : T_Z80_RLC reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x00|$2); }
;
z80_rlca : T_Z80_RLCA
{ out_AbsByte(0x07); }
;
z80_rr : T_Z80_RR reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x18|$2); }
;
z80_rra : T_Z80_RRA
{ out_AbsByte(0x1F); }
;
z80_rrc : T_Z80_RRC reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x08|$2); }
;
z80_rrca : T_Z80_RRCA
{ out_AbsByte(0x0F); }
;
z80_rst : T_Z80_RST const_8bit
{
if( rpn_isReloc(&$2) )
{
yyerror( "Address for RST must be absolute" );
}
else if( ($2.nVal&0x38)!=$2.nVal )
{
yyerror( "Invalid address for RST" );
}
else
out_AbsByte(0xC7|$2.nVal);
}
;
z80_sbc : T_Z80_SBC op_a_n { out_AbsByte(0xDE); out_RelByte(&$2); }
| T_Z80_SBC op_a_r { out_AbsByte(0x98|$2); }
;
z80_scf : T_Z80_SCF
{ out_AbsByte(0x37); }
;
z80_set : T_POP_SET const_3bit comma reg_r
{ out_AbsByte(0xCB); out_AbsByte(0xC0|($2<<3)|$4); }
;
z80_sla : T_Z80_SLA reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x20|$2); }
;
z80_sra : T_Z80_SRA reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x28|$2); }
;
z80_srl : T_Z80_SRL reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x38|$2); }
;
z80_stop : T_Z80_STOP
{ out_AbsByte(0x10); out_AbsByte(0x00); }
;
z80_sub : T_Z80_SUB op_a_n { out_AbsByte(0xD6); out_RelByte(&$2); }
| T_Z80_SUB op_a_r { out_AbsByte(0x90|$2); }
;
z80_swap : T_Z80_SWAP reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x30|$2); }
;
z80_xor : T_Z80_XOR op_a_n { out_AbsByte(0xEE); out_RelByte(&$2); }
| T_Z80_XOR op_a_r { out_AbsByte(0xA8|$2); }
;
op_mem_ind : '[' const_16bit ']' { $$ = $2 }
;
op_hl_ss : reg_ss { $$ = $1 }
| T_MODE_HL comma reg_ss { $$ = $3 }
;
op_a_r : reg_r { $$ = $1 }
| T_MODE_A comma reg_r { $$ = $3 }
;
op_a_n : const_8bit { $$ = $1 }
| T_MODE_A comma const_8bit { $$ = $3 }
;
comma : ','
;
ccode : T_CC_NZ { $$ = CC_NZ }
| T_CC_Z { $$ = CC_Z }
| T_CC_NC { $$ = CC_NC }
| T_MODE_C { $$ = CC_C }
;
reg_r : T_MODE_B { $$ = REG_B }
| T_MODE_C { $$ = REG_C }
| T_MODE_D { $$ = REG_D }
| T_MODE_E { $$ = REG_E }
| T_MODE_H { $$ = REG_H }
| T_MODE_L { $$ = REG_L }
| T_MODE_HL_IND { $$ = REG_HL_IND }
| T_MODE_A { $$ = REG_A }
;
reg_tt : T_MODE_BC { $$ = REG_BC }
| T_MODE_DE { $$ = REG_DE }
| T_MODE_HL { $$ = REG_HL }
| T_MODE_AF { $$ = REG_AF }
;
reg_ss : T_MODE_BC { $$ = REG_BC }
| T_MODE_DE { $$ = REG_DE }
| T_MODE_HL { $$ = REG_HL }
| T_MODE_SP { $$ = REG_SP }
;
reg_rr : T_MODE_BC_IND { $$ = REG_BC_IND }
| T_MODE_DE_IND { $$ = REG_DE_IND }
| T_MODE_HL_INDINC { $$ = REG_HL_INDINC }
| T_MODE_HL_INDDEC { $$ = REG_HL_INDDEC }
;
section : T_POP_SECTION string ',' sectiontype
{ out_NewSection($2,$4); }
| T_POP_SECTION string ',' sectiontype '[' const ']'
{
if( $6>=0 && $6<0x10000 )
out_NewAbsSection($2,$4,$6,-1);
else
yyerror( "Address must be 16-bit" );
}
| T_POP_SECTION string ',' sectiontype ',' T_OP_BANK '[' const ']'
{
if( $4==SECT_CODE )
{
if( $8>=1 && $8<=255 )
out_NewAbsSection($2,$4,-1,$8);
else
yyerror( "BANK value out of range" );
}
else
yyerror( "BANK only allowed for CODE/DATA" );
}
| T_POP_SECTION string ',' sectiontype '[' const ']' ',' T_OP_BANK '[' const ']'
{
if( $4==SECT_CODE )
{
if( $6>=0 && $6<0x10000 )
{
if( $11>=1 && $11<=255 )
out_NewAbsSection($2,$4,$6,$11);
else
yyerror( "BANK value out of range" );
}
else
yyerror( "Address must be 16-bit" );
}
else
yyerror( "BANK only allowed for CODE/DATA" );
}
;
sectiontype : T_SECT_BSS { $$=SECT_BSS; }
| T_SECT_VRAM { $$=SECT_VRAM; }
| T_SECT_CODE { $$=SECT_CODE; }
| T_SECT_HOME { $$=SECT_HOME; }
| T_SECT_HRAM { $$=SECT_HRAM; }
;
cpu_command : z80_adc
| z80_add
| z80_and
| z80_bit
| z80_call
| z80_ccf
| z80_cp
| z80_cpl
| z80_daa
| z80_dec
| z80_di
| z80_ei
| z80_ex
| z80_halt
| z80_inc
| z80_jp
| z80_jr
| z80_ld
| z80_ldd
| z80_ldi
| z80_ldio
| z80_nop
| z80_or
| z80_pop
| z80_push
| z80_res
| z80_ret
| z80_reti
| z80_rl
| z80_rla
| z80_rlc
| z80_rlca
| z80_rr
| z80_rra
| z80_rrc
| z80_rrca
| z80_rst
| z80_sbc
| z80_scf
| z80_set
| z80_sla
| z80_sra
| z80_srl
| z80_stop
| z80_sub
| z80_swap
| z80_xor
;
z80_adc : T_Z80_ADC op_a_n { out_AbsByte(0xCE); out_RelByte(&$2); }
| T_Z80_ADC op_a_r { out_AbsByte(0x88|$2); }
;
z80_add : T_Z80_ADD op_a_n { out_AbsByte(0xC6); out_RelByte(&$2); }
| T_Z80_ADD op_a_r { out_AbsByte(0x80|$2); }
| T_Z80_ADD op_hl_ss { out_AbsByte(0x09|($2<<4)); }
| T_Z80_ADD T_MODE_SP comma const_8bit
{ out_AbsByte(0xE8); out_RelByte(&$4); }
;
z80_and : T_Z80_AND op_a_n { out_AbsByte(0xE6); out_RelByte(&$2); }
| T_Z80_AND op_a_r { out_AbsByte(0xA0|$2); }
;
z80_bit : T_Z80_BIT const_3bit comma reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x40|($2<<3)|$4); }
;
z80_call : T_Z80_CALL const_16bit
{ out_AbsByte(0xCD); out_RelWord(&$2); }
| T_Z80_CALL ccode comma const_16bit
{ out_AbsByte(0xC4|($2<<3)); out_RelWord(&$4); }
;
z80_ccf : T_Z80_CCF
{ out_AbsByte(0x3F); }
;
z80_cp : T_Z80_CP op_a_n { out_AbsByte(0xFE); out_RelByte(&$2); }
| T_Z80_CP op_a_r { out_AbsByte(0xB8|$2); }
;
z80_cpl : T_Z80_CPL { out_AbsByte(0x2F); }
;
z80_daa : T_Z80_DAA { out_AbsByte(0x27); }
;
z80_dec : T_Z80_DEC reg_r
{ out_AbsByte(0x05|($2<<3)); }
| T_Z80_DEC reg_ss
{ out_AbsByte(0x0B|($2<<4)); }
;
z80_di : T_Z80_DI
{ out_AbsByte(0xF3); }
;
z80_ei : T_Z80_EI
{ out_AbsByte(0xFB); }
;
z80_ex : T_Z80_EX T_MODE_HL comma T_MODE_SP_IND
{ out_AbsByte(0xE3); }
| T_Z80_EX T_MODE_SP_IND comma T_MODE_HL
{ out_AbsByte(0xE3); }
;
z80_halt : T_Z80_HALT
{ out_AbsByte(0x76); out_AbsByte(0x00); }
;
z80_inc : T_Z80_INC reg_r
{ out_AbsByte(0x04|($2<<3)); }
| T_Z80_INC reg_ss
{ out_AbsByte(0x03|($2<<4)); }
;
z80_jp : T_Z80_JP const_16bit
{ out_AbsByte(0xC3); out_RelWord(&$2); }
| T_Z80_JP ccode comma const_16bit
{ out_AbsByte(0xC2|($2<<3)); out_RelWord(&$4); }
| T_Z80_JP T_MODE_HL_IND
{ out_AbsByte(0xE9); }
;
z80_jr : T_Z80_JR const_PCrel
{ out_AbsByte(0x18); out_PCRelByte(&$2); }
| T_Z80_JR ccode comma const_PCrel
{ out_AbsByte(0x20|($2<<3)); out_PCRelByte(&$4); }
;
z80_ldi : T_Z80_LDI T_MODE_HL_IND comma T_MODE_A
{ out_AbsByte(0x02|(2<<4)); }
| T_Z80_LDI T_MODE_A comma T_MODE_HL
{ out_AbsByte(0x0A|(2<<4)); }
;
z80_ldd : T_Z80_LDD T_MODE_HL_IND comma T_MODE_A
{ out_AbsByte(0x02|(3<<4)); }
| T_Z80_LDD T_MODE_A comma T_MODE_HL
{ out_AbsByte(0x0A|(3<<4)); }
;
z80_ldio : T_Z80_LDIO T_MODE_A comma op_mem_ind
{
rpn_CheckHRAM(&$4,&$4);
if( (!rpn_isReloc(&$4))
&& ($4.nVal<0 || ($4.nVal>0xFF && $4.nVal<0xFF00) || $4.nVal>0xFFFF) )
{
yyerror( "Source must be in the IO/HRAM area" );
}
out_AbsByte(0xF0);
$4.nVal&=0xFF;
out_RelByte(&$4);
}
| T_Z80_LDIO op_mem_ind comma T_MODE_A
{
rpn_CheckHRAM(&$2,&$2);
if( (!rpn_isReloc(&$2))
&& ($2.nVal<0 || ($2.nVal>0xFF && $2.nVal<0xFF00) || $2.nVal>0xFFFF) )
{
yyerror( "Destination must be in the IO/HRAM area" );
}
out_AbsByte(0xE0);
$2.nVal&=0xFF;
out_RelByte(&$2);
}
;
z80_ld : z80_ld_mem
| z80_ld_cind
| z80_ld_rr
| z80_ld_ss
| z80_ld_hl
| z80_ld_sp
| z80_ld_r
| z80_ld_a
;
z80_ld_hl : T_Z80_LD T_MODE_HL comma '[' T_MODE_SP const_8bit ']'
{ out_AbsByte(0xF8); out_RelByte(&$6); }
| T_Z80_LD T_MODE_HL comma const_16bit
{ out_AbsByte(0x01|(REG_HL<<4)); out_RelWord(&$4) }
;
z80_ld_sp : T_Z80_LD T_MODE_SP comma T_MODE_HL
{ out_AbsByte(0xF9); }
| T_Z80_LD T_MODE_SP comma const_16bit
{ out_AbsByte(0x01|(REG_SP<<4)); out_RelWord(&$4) }
;
z80_ld_mem : T_Z80_LD op_mem_ind comma T_MODE_SP
{ out_AbsByte(0x08); out_RelWord(&$2); }
| T_Z80_LD op_mem_ind comma T_MODE_A
{
if( (!rpn_isReloc(&$2)) && $2.nVal>=0xFF00)
{
out_AbsByte(0xE0);
out_AbsByte($2.nVal&0xFF);
}
else
{
out_AbsByte(0xEA);
out_RelWord(&$2);
}
}
;
z80_ld_cind : T_Z80_LD T_MODE_C_IND comma T_MODE_A
{ out_AbsByte(0xE2); }
;
z80_ld_rr : T_Z80_LD reg_rr comma T_MODE_A
{ out_AbsByte(0x02|($2<<4)); }
;
z80_ld_r : T_Z80_LD reg_r comma const_8bit
{ out_AbsByte(0x06|($2<<3)); out_RelByte(&$4); }
| T_Z80_LD reg_r comma reg_r
{
if( ($2==REG_HL_IND) && ($4==REG_HL_IND) )
{
yyerror( "LD (HL),(HL) not allowed" );
}
else
out_AbsByte(0x40|($2<<3)|$4);
}
;
z80_ld_a : T_Z80_LD reg_r comma T_MODE_C_IND
{
if( $2==REG_A )
out_AbsByte(0xF2);
else
{
yyerror( "Destination operand must be A" );
}
}
| T_Z80_LD reg_r comma reg_rr
{
if( $2==REG_A )
out_AbsByte(0x0A|($4<<4));
else
{
yyerror( "Destination operand must be A" );
}
}
| T_Z80_LD reg_r comma op_mem_ind
{
if( $2==REG_A )
{
if( (!rpn_isReloc(&$4)) && $4.nVal>=0xFF00 )
{
out_AbsByte(0xF0);
out_AbsByte($4.nVal&0xFF);
}
else
{
out_AbsByte(0xFA);
out_RelWord(&$4);
}
}
else
{
yyerror( "Destination operand must be A" );
}
}
;
z80_ld_ss : T_Z80_LD reg_ss comma const_16bit
{ out_AbsByte(0x01|($2<<4)); out_RelWord(&$4) }
;
z80_nop : T_Z80_NOP
{ out_AbsByte(0x00); }
;
z80_or : T_Z80_OR op_a_n
{ out_AbsByte(0xF6); out_RelByte(&$2); }
| T_Z80_OR op_a_r
{ out_AbsByte(0xB0|$2); }
;
z80_pop : T_Z80_POP reg_tt
{ out_AbsByte(0xC1|($2<<4)); }
;
z80_push : T_Z80_PUSH reg_tt
{ out_AbsByte(0xC5|($2<<4)); }
;
z80_res : T_Z80_RES const_3bit comma reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x80|($2<<3)|$4); }
;
z80_ret : T_Z80_RET
{ out_AbsByte(0xC9); }
| T_Z80_RET ccode
{ out_AbsByte(0xC0|($2<<3)); }
;
z80_reti : T_Z80_RETI
{ out_AbsByte(0xD9); }
;
z80_rl : T_Z80_RL reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x10|$2); }
;
z80_rla : T_Z80_RLA
{ out_AbsByte(0x17); }
;
z80_rlc : T_Z80_RLC reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x00|$2); }
;
z80_rlca : T_Z80_RLCA
{ out_AbsByte(0x07); }
;
z80_rr : T_Z80_RR reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x18|$2); }
;
z80_rra : T_Z80_RRA
{ out_AbsByte(0x1F); }
;
z80_rrc : T_Z80_RRC reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x08|$2); }
;
z80_rrca : T_Z80_RRCA
{ out_AbsByte(0x0F); }
;
z80_rst : T_Z80_RST const_8bit
{
if( rpn_isReloc(&$2) )
{
yyerror( "Address for RST must be absolute" );
}
else if( ($2.nVal&0x38)!=$2.nVal )
{
yyerror( "Invalid address for RST" );
}
else
out_AbsByte(0xC7|$2.nVal);
}
;
z80_sbc : T_Z80_SBC op_a_n { out_AbsByte(0xDE); out_RelByte(&$2); }
| T_Z80_SBC op_a_r { out_AbsByte(0x98|$2); }
;
z80_scf : T_Z80_SCF
{ out_AbsByte(0x37); }
;
z80_set : T_POP_SET const_3bit comma reg_r
{ out_AbsByte(0xCB); out_AbsByte(0xC0|($2<<3)|$4); }
;
z80_sla : T_Z80_SLA reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x20|$2); }
;
z80_sra : T_Z80_SRA reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x28|$2); }
;
z80_srl : T_Z80_SRL reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x38|$2); }
;
z80_stop : T_Z80_STOP
{ out_AbsByte(0x10); out_AbsByte(0x00); }
;
z80_sub : T_Z80_SUB op_a_n { out_AbsByte(0xD6); out_RelByte(&$2); }
| T_Z80_SUB op_a_r { out_AbsByte(0x90|$2); }
;
z80_swap : T_Z80_SWAP reg_r
{ out_AbsByte(0xCB); out_AbsByte(0x30|$2); }
;
z80_xor : T_Z80_XOR op_a_n { out_AbsByte(0xEE); out_RelByte(&$2); }
| T_Z80_XOR op_a_r { out_AbsByte(0xA8|$2); }
;
op_mem_ind : '[' const_16bit ']' { $$ = $2 }
;
op_hl_ss : reg_ss { $$ = $1 }
| T_MODE_HL comma reg_ss { $$ = $3 }
;
op_a_r : reg_r { $$ = $1 }
| T_MODE_A comma reg_r { $$ = $3 }
;
op_a_n : const_8bit { $$ = $1 }
| T_MODE_A comma const_8bit { $$ = $3 }
;
comma : ','
;
ccode : T_CC_NZ { $$ = CC_NZ }
| T_CC_Z { $$ = CC_Z }
| T_CC_NC { $$ = CC_NC }
| T_MODE_C { $$ = CC_C }
;
reg_r : T_MODE_B { $$ = REG_B }
| T_MODE_C { $$ = REG_C }
| T_MODE_D { $$ = REG_D }
| T_MODE_E { $$ = REG_E }
| T_MODE_H { $$ = REG_H }
| T_MODE_L { $$ = REG_L }
| T_MODE_HL_IND { $$ = REG_HL_IND }
| T_MODE_A { $$ = REG_A }
;
reg_tt : T_MODE_BC { $$ = REG_BC }
| T_MODE_DE { $$ = REG_DE }
| T_MODE_HL { $$ = REG_HL }
| T_MODE_AF { $$ = REG_AF }
;
reg_ss : T_MODE_BC { $$ = REG_BC }
| T_MODE_DE { $$ = REG_DE }
| T_MODE_HL { $$ = REG_HL }
| T_MODE_SP { $$ = REG_SP }
;
reg_rr : T_MODE_BC_IND { $$ = REG_BC_IND }
| T_MODE_DE_IND { $$ = REG_DE_IND }
| T_MODE_HL_INDINC { $$ = REG_HL_INDINC }
| T_MODE_HL_INDDEC { $$ = REG_HL_INDDEC }
;
%%