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Rangi
5869e0dc60
Since SRAM sections start from 0, we had been using a signed `int8_t curScrambleSRAM` counter to allow 0 as a scrambled bank, but this actually just placed all floating SRAM sections in bank 0.
26 lines
444 B
NASM
26 lines
444 B
NASM
DEF N = 6
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SECTION "fixed", ROMX, BANK[3]
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; XXX: We rely on these landing at certain banks, which isn't *guaranteed*...
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FOR i, 1, N + 1
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db BANK(xLabel{d:i})
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ENDR
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FOR i, 1, N + 1
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db BANK(wLabel{d:i})
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ENDR
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FOR i, 1, N + 1
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db BANK(sLabel{d:i})
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ENDR
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ds $1000 - N * 3, $ff
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FOR i, 1, N + 1
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SECTION "floating{d:i}", ROMX
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xLabel{d:i}:: ds $2000, i
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SECTION "wram{d:i}", WRAMX
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wLabel{d:i}:: dw
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SECTION "sram{d:i}", SRAM
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sLabel{d:i}:: dw
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ENDR
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