mirror of
https://github.com/gbdev/rgbds.git
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Improve linker scripts a little (#1275)
* Allow for optional sections in linker scripts These are more useful for frameworks/toolchains. * Check for an active mem region everywhere Do you like segfaults? Too bad! * Allow the address to be floating in linker scripts Try and make the life of SDCC interop easier. * Also validate alignment when floating * Overhaul the linker script manual page Documenting the new features, but also restructuring the existing documentation to make the manual page (hopefully) easier to understand.
This commit is contained in:
Eldred Habert
GitHub
212
man/rgblink.5
212
man/rgblink.5
@@ -7,47 +7,41 @@
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.Nm rgblink
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.Nd linker script file format
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.Sh DESCRIPTION
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The linker script is an external file that allows the user to specify the order of sections at link time and in a centralized manner.
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The linker script is a file that allows specifying attributes for sections at link time, and in a centralized manner.
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There can only be one linker script per invocation of
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.Nm ,
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but it can be split into several files
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.Pq using the Ic INCLUDE No directive .
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.Ss Basic syntax
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The linker script syntax is line-based.
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Each line may have a directive or section name, a comment, both, or neither.
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Whitespace (space and tab characters) is used to separate syntax elements, but is otherwise ignored.
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.Pp
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A linker script consists of a series of bank declarations, each optionally followed by a list of section names (in double quotes) or directives.
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All reserved keywords (bank types and directive names) are case-insensitive; all section names are case-sensitive.
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.Pp
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Any line can contain a comment starting with
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Comments begin with a semicolon
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.Ql \&;
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that ends at the end of the line.
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.Bd -literal -offset indent
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; This line is a comment
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ROMX $F ; start a bank
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"Some functions" ; a section name
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ALIGN 8 ; a directive
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"Some array"
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WRAMX 2 ; start another bank
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org $d123 ; another directive
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"Some variables"
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.Ed
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character, until the end of the line.
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They are simply ignored.
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.Pp
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Numbers can be in decimal or hexadecimal format
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.Pq the prefix is Ql $ .
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It is an error if any section name or directive is found before setting a bank.
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Keywords are composed of letters and digits (but they can't start with a digit); they are all case-insensitive.
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.Pp
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Files can be included by using the
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.Ic INCLUDE
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keyword, followed by a string with the path of the file that has to be included.
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.Pp
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The possible bank types are:
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.Cm ROM0 , ROMX , VRAM , SRAM , WRAM0 , WRAMX , OAM
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and
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.Cm HRAM .
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Unless there is a single bank, which can occur with types
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.Cm ROMX , VRAM , SRAM
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and
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.Cm WRAMX ,
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it is mandatory to specify a bank number after the type.
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.Pp
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Section names in double quotes support the same character escape sequences as strings in
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Numbers can be written in decimal format, or in binary using the
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.Ql %
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prefix, or in hexadecimal using the
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.Ql $
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prefix (hexadecimal digits are case-insensitive).
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Note that unlike
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.Xr rgbasm 5 ,
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specifically
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an octal
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.Ql &
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prefix is not supported, nor are
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.Ql _
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digit separators.
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.Pp
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Strings begin with a double quote, and end at the next (non-escaped) double quote.
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Strings must not contain literal newline characters.
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Most of the same character escapes as
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.Xr rgbasm 5
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are supported, specifically
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.Ql \e\e ,
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.Ql \e" ,
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.Ql \en ,
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@@ -56,51 +50,113 @@ and
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.Ql \et .
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Other backslash escape sequences in
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.Xr rgbasm 5
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are only relevant to assembly code and do not apply in section names.
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.Pp
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When a new bank statement is found, sections found after it will be placed right from the beginning of that bank.
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If the linker script switches to a different bank and then comes back to a previous one, it will continue from the last address that was used.
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.Pp
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The only three directives are
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.Ic ORG ,
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.Ic ALIGN ,
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are only relevant to assembly code and do not apply in linker scripts.
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.Ss Directives
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.Bl -tag -width Ds
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.It Including other files
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.Ql Ic INCLUDE Ar path
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acts as if the contents of the file at
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.Ar path
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were copy-pasted in place of the
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.Ic INCLUDE
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directive.
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.Ar path
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must be a string.
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.It Specifying the active bank
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.Tg region
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The active bank can be set by specifying its type (memory region) and number.
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The possible types are:
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.Ic ROM0 , ROMX , VRAM , SRAM , WRAM0 , WRAMX , OAM ,
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and
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.Ic DS :
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.Bl -bullet
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.It
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.Ic ORG Ar addr
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sets the address in which new sections will be placed to
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.Ic HRAM .
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The bank number can be omitted from the types that only contain a single bank, which are:
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.Ic ROM0 ,
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.Ic ROMX No if Fl t No is passed to Xr rgblink 1 ,
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.Ic VRAM No if Fl d No is passed to Xr rgblink 1 ,
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.Ic WRAM0 ,
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.Ic WRAMX No if Fl w No is passed to Xr rgblink 1 ,
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.Ic OAM ,
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and
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.Ic HRAM .
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.Pq Ic SRAM No is the only type that can never have its bank number omitted.
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.Pp
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After a bank specification, the
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.Dq current address
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is set to the last value it had for that bank.
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If the bank has never been active thus far, the
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.Dq current address
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defaults to the beginning of the bank
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.Pq e.g. Ad $4000 No for Ic ROMX No sections .
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.It Changing the current address
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A bank must be active for any of these directives to be used.
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.Pp
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.Ql Ic ORG Ar addr
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sets the
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.Dq current address
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to
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.Ar addr .
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It can not be lower than the current address.
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.It
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.Ic ALIGN Ar addr
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or
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.Ic ALIGN Ar addr , Ar offset
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will increase the address until it is aligned to the specified boundary
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.Po it tries to set to
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.Ar offset
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the number of bits specified by
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.Ar align :
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for example,
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.Ql ALIGN 8
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will align to $100 ,
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and
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.Ql ALIGN 8 , 10
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will align to $10A
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.Pc .
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.It
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.Ic DS
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will increase the address by the specified non-negative amount.
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.El
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This directive cannot be used to move the address backwards:
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.Ar addr
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must be greater than or equal to the
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.Dq current address .
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.Pp
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.Sy Note :
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The bank, alignment, address and type of sections can be specified both in the source code and in the linker script.
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For a section to be able to be placed with the linker script, the bank, address and alignment must be left unassigned in the source code or be compatible with what is specified in the linker script.
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For example,
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.Ql ALIGN[8]
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in the source code is compatible with
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.Ql ORG $F00
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in the linker script.
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.Ql Ic FLOATING
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causes all sections between it and the next
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.Ic ORG
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or bank specification to be placed at addresses automatically determined by
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.Nm .
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.Pp
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.Ql Ic ALIGN Ar addr , Ar offset
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increases the
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.Dq current address
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until it is aligned to the specified boundary (i.e. the
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.Ar align
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lowest bits of the address are equal to
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.Ar offset ) .
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If
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.Ar offset
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is omitted, it is implied to be 0.
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For example, if the
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.Dq current address
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is $0007,
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.Ql ALIGN 8
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would set it to $0100, and
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.Ql ALIGN 8 , 10
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would set it to $000A.
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.Pp
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.Ql Ic DS Ar size
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increases the
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.Dq current address
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by
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.Ar size .
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The gap is not allocated, so smaller floating sections can later be placed there.
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.El
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.Ss Section placement
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A section can be placed simply by naming it (with a string).
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Its bank is set to the active bank, and its address to the
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.Dq current address .
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Any constraints the section already possesses (whether from earlier in the linker script, or from the object files being linked) must be consistent with what the linker script specifies: the section's type must match, the section's bank number (if set) must match the active bank, etc.
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In particular, if the section has an alignment constraint, the address at which it is placed by the linker script must obey that constraint; otherwise, an error will occur.
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.Pp
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After a section is placed, the
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.Dq current address
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is increased by the section's size.
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This must not increase it past the end of the active memory region.
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.Pp
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The section must have been defined in the object files being linked, unless the section name is followed by the keyword
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.Ic OPTIONAL .
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.Sh EXAMPLES
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.Bd -literal -offset indent
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; This line contains only a comment
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ROMX $F ; start a bank
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"Some functions" ; a section name
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ALIGN 8 ; a directive
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"Some \e"array\e""
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WRAMX 2 ; start another bank
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org $d123 ; another directive
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"Some variables"
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.Ed
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.Sh SEE ALSO
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.Xr rgbasm 1 ,
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.Xr rgbasm 5 ,
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@@ -37,9 +37,10 @@
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static void setSectionType(SectionType type);
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static void setSectionType(SectionType type, uint32_t bank);
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static void setAddr(uint32_t addr);
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static void makeAddrFloating(void);
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static void alignTo(uint32_t alignment, uint32_t offset);
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static void pad(uint32_t length);
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static void placeSection(std::string const &name);
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static void placeSection(std::string const &name, bool isOptional);
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static yy::parser::symbol_type yylex(void);
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@@ -53,21 +54,27 @@
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%token newline
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%token COMMA ","
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%token ORG "ORG"
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FLOATING "FLOATING"
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INCLUDE "INCLUDE"
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ALIGN "ALIGN"
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DS "DS"
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OPTIONAL "OPTIONAL"
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%code {
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static std::array keywords{
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Keyword{"ORG"sv, yy::parser::make_ORG},
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Keyword{"INCLUDE"sv, yy::parser::make_INCLUDE},
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Keyword{"ALIGN"sv, yy::parser::make_ALIGN},
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Keyword{"DS"sv, yy::parser::make_DS},
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Keyword{"ORG"sv, yy::parser::make_ORG},
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Keyword{"FLOATING"sv, yy::parser::make_FLOATING},
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Keyword{"INCLUDE"sv, yy::parser::make_INCLUDE},
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Keyword{"ALIGN"sv, yy::parser::make_ALIGN},
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Keyword{"DS"sv, yy::parser::make_DS},
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Keyword{"OPTIONAL"sv, yy::parser::make_OPTIONAL},
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};
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}
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%token <std::string> string;
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%token <uint32_t> number;
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%token <SectionType> section_type;
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%type <bool> optional;
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%%
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lines: %empty
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@@ -82,11 +89,16 @@ line: INCLUDE string newline { includeFile(std::move($2)); } // Note: this addit
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directive: section_type { setSectionType($1); }
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| section_type number { setSectionType($1, $2); }
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| FLOATING { makeAddrFloating(); }
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| ORG number { setAddr($2); }
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| ALIGN number { alignTo($2, 0); }
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| ALIGN number COMMA number { alignTo($2, $4); }
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| DS number { pad($2); }
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| string { placeSection($1); }
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| string optional { placeSection($1, $2); }
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;
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optional: %empty { $$ = false; }
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| OPTIONAL { $$ = true; }
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;
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%%
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@@ -318,10 +330,14 @@ try_again: // Can't use a `do {} while(0)` loop, otherwise compilers (wrongly) t
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static std::array<std::vector<uint16_t>, SECTTYPE_INVALID> curAddr;
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static SectionType activeType; // Index into curAddr
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static uint32_t activeBankIdx; // Index into curAddr[activeType]
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static bool isPcFloating;
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static uint16_t floatingAlignMask;
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static uint16_t floatingAlignOffset;
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static void setActiveTypeAndIdx(SectionType type, uint32_t idx) {
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activeType = type;
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activeBankIdx = idx;
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isPcFloating = false;
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if (curAddr[activeType].size() <= activeBankIdx) {
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curAddr[activeType].resize(activeBankIdx + 1, sectionTypeInfo[type].startAddr);
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}
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@@ -344,11 +360,11 @@ static void setSectionType(SectionType type, uint32_t bank) {
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auto const &typeInfo = sectionTypeInfo[type];
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if (bank < typeInfo.firstBank) {
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scriptError(context, "%s bank %" PRIu32 " doesn't exist, the minimum is %" PRIu32,
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scriptError(context, "%s bank %" PRIu32 " doesn't exist (the minimum is %" PRIu32 ")",
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typeInfo.name.c_str(), bank, typeInfo.firstBank);
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bank = typeInfo.firstBank;
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} else if (bank > typeInfo.lastBank) {
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scriptError(context, "%s bank %" PRIu32 " doesn't exist, the maximum is %" PRIu32,
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scriptError(context, "%s bank %" PRIu32 " doesn't exist (the maximum is %" PRIu32 ")",
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typeInfo.name.c_str(), bank, typeInfo.lastBank);
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}
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@@ -357,22 +373,64 @@ static void setSectionType(SectionType type, uint32_t bank) {
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static void setAddr(uint32_t addr) {
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auto const &context = lexerStack.back();
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if (activeType == SECTTYPE_INVALID) {
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scriptError(context, "Cannot set the current address: no memory region is active");
|
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return;
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}
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auto &pc = curAddr[activeType][activeBankIdx];
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auto const &typeInfo = sectionTypeInfo[activeType];
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if (addr < pc) {
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scriptError(context, "ORG cannot be used to go backwards (from $%04x to $%04x)", pc, addr);
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scriptError(context, "Cannot decrease the current address (from $%04x to $%04x)", pc, addr);
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} else if (addr > endaddr(activeType)) { // Allow "one past the end" sections.
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scriptError(context, "Cannot go to $%04" PRIx32 ": %s ends at $%04" PRIx16 "",
|
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scriptError(context, "Cannot set the current address to $%04" PRIx32 ": %s ends at $%04" PRIx16 "",
|
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addr, typeInfo.name.c_str(), endaddr(activeType));
|
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pc = endaddr(activeType);
|
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} else {
|
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pc = addr;
|
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}
|
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isPcFloating = false;
|
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}
|
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|
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static void makeAddrFloating(void) {
|
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auto const &context = lexerStack.back();
|
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if (activeType == SECTTYPE_INVALID) {
|
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scriptError(context, "Cannot make the current address floating: no memory region is active");
|
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return;
|
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}
|
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|
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isPcFloating = true;
|
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floatingAlignMask = 0;
|
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floatingAlignOffset = 0;
|
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}
|
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|
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static void alignTo(uint32_t alignment, uint32_t alignOfs) {
|
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auto const &context = lexerStack.back();
|
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if (activeType == SECTTYPE_INVALID) {
|
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scriptError(context, "Cannot align: no memory region is active");
|
||||
return;
|
||||
}
|
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|
||||
if (isPcFloating) {
|
||||
if (alignment >= 16) {
|
||||
setAddr(floatingAlignOffset);
|
||||
} else {
|
||||
uint32_t alignSize = 1u << alignment;
|
||||
|
||||
if (alignOfs >= alignSize) {
|
||||
scriptError(context, "Cannot align: The alignment offset (%" PRIu32
|
||||
") must be less than alignment size (%" PRIu32 ")\n",
|
||||
alignOfs, alignSize);
|
||||
return;
|
||||
}
|
||||
|
||||
floatingAlignMask = alignSize - 1;
|
||||
floatingAlignOffset = alignOfs % alignSize;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
auto const &typeInfo = sectionTypeInfo[activeType];
|
||||
auto &pc = curAddr[activeType][activeBankIdx];
|
||||
|
||||
@@ -391,7 +449,7 @@ static void alignTo(uint32_t alignment, uint32_t alignOfs) {
|
||||
if (alignOfs >= alignSize) {
|
||||
scriptError(context, "Cannot align: The alignment offset (%" PRIu32
|
||||
") must be less than alignment size (%" PRIu32 ")\n",
|
||||
alignOfs, 1 << alignment);
|
||||
alignOfs, alignSize);
|
||||
return;
|
||||
}
|
||||
|
||||
@@ -411,23 +469,30 @@ static void alignTo(uint32_t alignment, uint32_t alignOfs) {
|
||||
|
||||
static void pad(uint32_t length) {
|
||||
auto const &context = lexerStack.back();
|
||||
if (activeType == SECTTYPE_INVALID) {
|
||||
scriptError(context, "Cannot increase the current address: no memory region is active");
|
||||
return;
|
||||
}
|
||||
|
||||
if (isPcFloating) {
|
||||
floatingAlignOffset = (floatingAlignOffset + length) & floatingAlignMask;
|
||||
return;
|
||||
}
|
||||
|
||||
auto const &typeInfo = sectionTypeInfo[activeType];
|
||||
auto &pc = curAddr[activeType][activeBankIdx];
|
||||
|
||||
assert(pc >= typeInfo.startAddr);
|
||||
if (uint16_t offset = pc - typeInfo.startAddr; length + offset > typeInfo.size) {
|
||||
scriptError(context, "Cannot pad by %u bytes: only %u bytes to $%04" PRIx16,
|
||||
scriptError(context, "Cannot increase the current address by %u bytes: only %u bytes to $%04" PRIx16,
|
||||
length, typeInfo.size - offset, (uint16_t)(endaddr(activeType) + 1));
|
||||
} else {
|
||||
pc += length;
|
||||
}
|
||||
}
|
||||
|
||||
static void placeSection(std::string const &name) {
|
||||
static void placeSection(std::string const &name, bool isOptional) {
|
||||
auto const &context = lexerStack.back();
|
||||
auto const &typeInfo = sectionTypeInfo[activeType];
|
||||
|
||||
// A type *must* be active.
|
||||
if (activeType == SECTTYPE_INVALID) {
|
||||
scriptError(context, "No memory region has been specified to place section \"%s\" in",
|
||||
name.c_str());
|
||||
@@ -436,10 +501,13 @@ static void placeSection(std::string const &name) {
|
||||
|
||||
auto *section = sect_GetSection(name.c_str());
|
||||
if (!section) {
|
||||
scriptError(context, "Unknown section \"%s\"", name.c_str());
|
||||
if (!isOptional) {
|
||||
scriptError(context, "Unknown section \"%s\"", name.c_str());
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
auto const &typeInfo = sectionTypeInfo[activeType];
|
||||
assert(section->offset == 0);
|
||||
// Check that the linker script doesn't contradict what the code says.
|
||||
if (section->type == SECTTYPE_INVALID) {
|
||||
@@ -460,28 +528,37 @@ static void placeSection(std::string const &name) {
|
||||
section->isBankFixed = true;
|
||||
section->bank = bank;
|
||||
|
||||
uint16_t &org = curAddr[activeType][activeBankIdx];
|
||||
if (section->isAddressFixed && org != section->org) {
|
||||
scriptError(context, "The linker script assigns section \"%s\" to address $%04" PRIx16 ", but it was already at $%04" PRIx16,
|
||||
name.c_str(), org, section->org);
|
||||
} else if (section->isAlignFixed && (org & section->alignMask) != section->alignOfs) {
|
||||
uint8_t alignment = std::countr_one(section->alignMask);
|
||||
scriptError(context, "The linker script assigns section \"%s\" to address $%04" PRIx16 ", but that would be ALIGN[%" PRIu8 ", %" PRIu16 "] instead of the requested ALIGN[%" PRIu8 ", %" PRIu16 "]",
|
||||
name.c_str(), org, alignment, (uint16_t)(org & section->alignMask), alignment, section->alignOfs);
|
||||
}
|
||||
section->isAddressFixed = true;
|
||||
section->isAlignFixed = false; // This can't be set when the above is.
|
||||
section->org = org;
|
||||
if (!isPcFloating) {
|
||||
uint16_t &org = curAddr[activeType][activeBankIdx];
|
||||
if (section->isAddressFixed && org != section->org) {
|
||||
scriptError(context, "The linker script assigns section \"%s\" to address $%04" PRIx16 ", but it was already at $%04" PRIx16,
|
||||
name.c_str(), org, section->org);
|
||||
} else if (section->isAlignFixed && (org & section->alignMask) != section->alignOfs) {
|
||||
uint8_t alignment = std::countr_one(section->alignMask);
|
||||
scriptError(context, "The linker script assigns section \"%s\" to address $%04" PRIx16 ", but that would be ALIGN[%" PRIu8 ", %" PRIu16 "] instead of the requested ALIGN[%" PRIu8 ", %" PRIu16 "]",
|
||||
name.c_str(), org, alignment, (uint16_t)(org & section->alignMask), alignment, section->alignOfs);
|
||||
}
|
||||
section->isAddressFixed = true;
|
||||
section->isAlignFixed = false; // This can't be set when the above is.
|
||||
section->org = org;
|
||||
|
||||
uint16_t curOfs = org - typeInfo.startAddr;
|
||||
if (section->size > typeInfo.size - curOfs) {
|
||||
scriptError(context, "The linker script assigns section \"%s\" to address $%04" PRIx16 ", but then it would overflow %s by %" PRIx16 " bytes",
|
||||
name.c_str(), org, typeInfo.name.c_str(),
|
||||
(uint16_t)(section->size - (typeInfo.size - curOfs)));
|
||||
// Fill as much as possible without going out of bounds.
|
||||
org = typeInfo.startAddr + typeInfo.size;
|
||||
uint16_t curOfs = org - typeInfo.startAddr;
|
||||
if (section->size > typeInfo.size - curOfs) {
|
||||
scriptError(context, "The linker script assigns section \"%s\" to address $%04" PRIx16 ", but then it would overflow %s by %" PRIx16 " bytes",
|
||||
name.c_str(), org, typeInfo.name.c_str(),
|
||||
(uint16_t)(section->size - (typeInfo.size - curOfs)));
|
||||
// Fill as much as possible without going out of bounds.
|
||||
org = typeInfo.startAddr + typeInfo.size;
|
||||
} else {
|
||||
org += section->size;
|
||||
}
|
||||
} else {
|
||||
org += section->size;
|
||||
section->isAddressFixed = false;
|
||||
section->isAlignFixed = floatingAlignMask != 0;
|
||||
section->alignMask = floatingAlignMask;
|
||||
section->alignOfs = floatingAlignOffset;
|
||||
|
||||
floatingAlignOffset = (floatingAlignOffset + section->size) & floatingAlignMask;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Reference in New Issue
Block a user